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2018-03-13arch-stm32: Factorize stm32.h for STM32F4 and F7Patrice Chotard
For STM32F4 and F7 SoCx family, a specific stm32.h file exists. Some common defines are duplicated or even unused in each of these stm32.h. Factorize all common definition in arch/arm/include/asm/stm32f.h and keep specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Add DSI clock supportPatrice Chotard
DSI clock is available on STM32F769-disco and STM32F469-disco board. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Add set_rate for LTDC clockPatrice Chotard
Implement set_rate() for LTDC clock only, set_rate for other clocks will be added if needed. This is needed by future LTDC driver improvements. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clockPatrice Chotard
Configure SAI PLL configuration to generate LTDC pixel clock on the PLLSAIR output. PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Rework SDMMC stm32_clk_get_rate() partPatrice Chotard
Rework the way SDMMC clock get rate is done in a more generic way : _ Add stm32_clk_get_pllsai_rate() which give the PLLSAI indicated output rate. _ Add stm32_clk_get_pllsai_vco_rate() which give the VCO internal rate. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: No more need of 48Mhz from PLL_SAIPatrice Chotard
Initially, 48Mhz for SDIO clock was generated from SAI pll for STM32F469 and STM32F746 SoCs, but this solution was not suitable for STM32F429 SoCs. A generic solution is to used the PLL_Q output as 48Mhz clock for all STM32F SOCs family. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Fix RCC_PLLSAICFGR mask definesPatrice Chotard
Use the correct name for RCC_PLLSAICFGR_PLLSAIx_MASK masks. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Fix stm32_clk_get_rate()Patrice Chotard
Wrong parameter was passed to stm32_clk_pll48clk_rate(). sysclk (PLL_p output value) was passed instead of VCO value. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13mmc: stm32: sdmmc2: add support for st, pin-ckinsdmmc_ckinPatrick Delaunay
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature. When using an external driver (a voltage switch transceiver), it's advised to select SDMMC_CKIN feedback clock input to sample the received data. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13mmc: stm32: sdmmc2: add hardware flow control supportPatrick Delaunay
The hardware flow control functionality is used to avoid FIFO underrun (TX mode) and overrun (RX mode) errors. The behavior is to stop SDMMC_CK during data transfer and freeze the SDMMC state machines. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13board: stm32: switch to DM STM32 timerPatrice Chotard
Use available DM stm32_timer driver instead of dedicated mach-stm32/stm32fx/timer.c. Remove all defines or files previously used for timer usage in arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx Enable DM STM32_TIMER for STM32F4/F7 and H7. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32h7: Fix prescaler for Domain 3Patrice Chotard
d1cfgr register was used to calculate the domain 3 prescaler value instead of d3cfgr. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32h7: Fix stm32_clk_get_rate() for timerPatrice Chotard
For timer clock, an additional prescaler is used which was not taken into account previously. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13clk: clk_stm32f: Fix stm32_clk_get_rate() for timerPatrice Chotard
For timer clock, an additionnal prescaler is used which was not taken into account previously. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13timer: stm32: Add timer support for STM32 SoCs familyPatrice Chotard
This timer driver is using GPT Timer (General Purpose Timer) available on all STM32 SOCs family. This driver can be used on STM32F4/F7 and H7 SoCs family Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-13Merge git://git.denx.de/u-boot-rockchipTom Rini
2018-03-13Merge branch 'next' of git://git.denx.de/u-boot-videoTom Rini
2018-03-13rockchip: pwm: convert to use live dtKever Yang
use live dt api to get base addr Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk1108: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3328: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3288: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk322x: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3188: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-13rockchip: clk: rk3036: convert to use live dtKever Yang
Use live dt api to get cru base addr. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-09bcm283x_pl011: Flush RX queue after setting baud rateAlexander Graf
After the UART was initialized, we may still have bogus data in the RX queue if it was enabled with incorrect pin muxing before. So let's flush the RX queue whenever we initialize baud rates. This fixes a regression with the dynamic pinmuxing code when enable_uart=1 is not set in config.txt on Raspberry Pis that use pl011 for serial. Fixes: caf2233b28 ("bcm283x: Add pinctrl driver") Reported-by: Göran Lundberg <goran@lundberg.email> Reported-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09serial_bcm283x_mu: Flush RX queue after setting baud rateAlexander Graf
After the UART was initialized, we may still have bogus data in the RX queue if it was enabled with incorrect pin muxing before. So let's flush the RX queue whenever we initialize baud rates. This fixes a regression with the dynamic pinmuxing code when enable_uart=1 is not set in config.txt. Fixes: caf2233b28 ("bcm283x: Add pinctrl driver") Reported-by: Göran Lundberg <goran@lundberg.email> Reported-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09sunxi: video: mark framebuffer as EFI reserved memoryHeinrich Schuchardt
Inform the EFI subsystem that the framebuffer memory is reserved. Without the patch the AllocatePool boot service allocates memory from the framebuffer which will will be overwritten by screen output. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09treewide: Fix gdsys mail addressesMario Six
The @gdsys.cc addresses are supposed to be used for mailing lists. Switch all occurrences of @gdsys.de mail addresses to their @gdsys.cc equivalent. Also, Dirk's address was wrong in one place; fix that as well. Signed-off-by: Mario Six <six@gdsys.cc>
2018-03-06video: indicate code page of bitmap fontsHeinrich Schuchardt
Add comments clarifying that the bitmap fonts support code page 437. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-06pwm-backlight: make power-supply as optionKever Yang
Some pwm backlight may not need 'power-supply', let's make it as option in pwm-backlight driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-06dm: video: support increased intensity (bold)Heinrich Schuchardt
Support special rendition code 0 - reset attributes. Support special rendition code 1 - increased intensity (bold). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-06dm: video: use constants to refer to colorsHeinrich Schuchardt
Use constants to refer to colors. Adjust initialization of foreground and background color to avoid setting reserved bits. Consistently u32 instead of unsigned for color bit mask. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-06dm: video: correctly clean background in 16bit modeHeinrich Schuchardt
In 16 bit mode we have to copy two bytes per pixels repeatedly and not four. Otherwise we will see a striped pattern. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-06dm: video: show correct colors in graphical consoleHeinrich Schuchardt
Get RGB sequence in pixels right (swap blue and red). Do not set reserved bits. qemu-system-i386 -display sdl -vga virtio and qemu-system-i386 -display sdl -vga cirrus now display the similar colors (highlighting still missing) as qemu-system-i386 -nographic Testing is possible via setenv efi_selftest test output bootefi selftest Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-03-05Merge git://git.denx.de/u-boot-shTom Rini
2018-03-05libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada
Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05input: indicate that code page 437 is usedHeinrich Schuchardt
Add a comment indicating that the German key map assumes code page 437. Add support for character ² (square sign) in the German key map. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05pinctrl: Kconfig: Fix typoMarek Behún
Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-05gpio: pca953x_gpio: Support label setting from DTMario Six
The PCA953x driver uses "gpio@%x_" as the GPIO bank name, where "%x" is instantiated with the I2C address of the chip. While this works, it becomes very confusing if a board has multiple PCAs with the same address on different I2C busses, and it also becomes an issue when a GPIO's value is to be set via the 'gpio' command, because this command only ever sets the value of the first device it encounters, leaving the other devices inaccessible to the command. As to not break boards that rely on this naming scheme, we introduce a new device tree string property "label" for the driver. If it exists, it is used to build a bank name of the form "%s@%x_" (where %x is still instantiated with the I2C address). If it does not exist, the legacy labeling scheme is used. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-03-05spl: Kconfig: Rename SPL_USBETH_SUPPORT to SPL_USB_ETHER to match with the ↵Faiz Abbas
U-boot CONFIG Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER. This enables users to block text using CONFIG_IS_ENABLED() instead of resorting to #if ladders with SPL and non-SPL cases. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-03-05Atmel TPM: Fix potential buffer overrunsJeremy Boone
Ensure that the Atmel TPM driver performs sufficient validation of the length returned in the TPM response header. This patch prevents memory corruption if the header contains a length value that is larger than the destination buffer. Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05Infineon TPM: Fix potential buffer overrunsJeremy Boone
Ensure that the Infineon I2C and SPI TPM driver performs adequate validation of the length extracted from the TPM response header. This patch prevents integer underflow when the length was too small, which could lead to memory corruption. Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05STMicro TPM: Fix potential buffer overrunsJeremy Boone
This patch prevents integer underflow when the length was too small, which could lead to memory corruption. Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05usb: xhci-rcar: Add R8A77965 M3N entriesMarek Vasut
Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05pinctrl: rmobile: Add R8A77965 M3N entriesMarek Vasut
Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05net: ravb: Add R8A77965 M3N entriesMarek Vasut
Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-03-05mmc: uniphier-sd: Add R8A77965 M3N entriesMarek Vasut
Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05gpio: rcar: Add R8A77965 M3N entriesMarek Vasut
Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05clk: renesas: Add R8A77965 M3N entriesMarek Vasut
Add entries for the R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-01mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQVipul Kumar
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ and enabled it in respective defconfig. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2024-12-28 18:27:17 +0000