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2020-04-16Merge tag 'arc-fixes-for-2020.07-rc1' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-arc This is pretty minor set of changes mostly touching HSDK board: * Enable on-chip reset controller on HSDK * Add possibility to turn-on & off L2$ on more recent ARC HS processors. * AXI tunnel clock calculation on HSDK
2020-04-16Merge tag 'efi-2020-07-rc1' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-07-rc1 This pull request * provides an implementation of UEFI secure booting * fixes a problem with the rsa_mod_exp driver which stops some boards from booting when CONFIG_RSA is enabled which is needed for UEFI secure booting * enables the EFI_RNG_PROTOCOL if DM_RNG is enabled * fixes some function comments
2020-04-16ARC: HSDK: CGU: fix tunnel clock calculationEugeniy Paltsev
We set wrong tunnel PLL frequency when we request 125MHz tunnel clock. Fix that. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-16Merge tag 'dm-pull-10apr20-take2' of git://git.denx.de/u-boot-dmTom Rini
Functions for reading indexed values from device tree Enhancements to 'dm' command Log test enhancements and syslog driver DM change to read parent ofdata before children Minor fixes
2020-04-16dm: core: Read parent ofdata before childrenSimon Glass
At present a device can read its ofdata before its parent has done the same. This can cause problems in the case where the parent has a 'ranges' property, thus affecting the operation of dev_read_addr(), for example. We already probe parent devices before children so it does not seem to be a large step to do the same with ofdata. Make the change and update the documentation in this area. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-16dm: core: remove the duplicated function dm_ofnode_pre_relocPatrick Delaunay
The content dm_ofnode_pre_reloc() is identical with ofnode_pre_reloc() defined in drivers/core/ofnode.c and used only three times: - drivers/core/lists.c:lists_bind_fdt() - drivers/clk/at91/pmc.c::at91_clk_sub_device_bind - drivers/clk/altera/clk-arria10.c::socfpga_a10_clk_bind So this function dm_ofnode_pre_reloc can be removed and replaced by these function calls by ofnode_pre_reloc(). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: core: refactor functions reading an u32 from dtDario Binacchi
Now reading a 32 bit value from a device-tree property can be expressed as reading the first element of an array with a single value. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: core: support reading a single indexed u32 valueDario Binacchi
The patch adds helper functions to allow reading a single indexed u32 value from a device-tree property containing multiple u32 values, that is an array of integers. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: core: Add a way to skip powering down power domainsSimon Glass
When removing a device the power domains it uses are generally powered off. But when we are trying to unbind all devices (e.g. for running tests) we don't want to probe a device in the 'remove' path. Add a new flag to skip this power-down step. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: core: Add logging on unbind failureSimon Glass
This failure path is tricky to debug since it continues after failure and there are a lot of error paths. Add logging to help. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: core: Move "/chosen" and "/firmware" node scanPatrick Delaunay
Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes which aren't devices themselves but may contain some: - "/chosen" - "/clocks" - "/firmware" The patch removes the strcmp call in recursive function dm_scan_fdt_live() and also corrects a conflict with the 2 applied patches in the commit 1712ca21924b ("dm: core: Scan /firmware node by default") and in the commit 747558d01457 ("dm: fdt: scan for devices under /firmware too"): the subnodes of "/firmware" (optee for example) are bound 2 times. For example the dm tree command result on STM32MP1 is: STM32MP> dm tree Class Index Probed Driver Name ----------------------------------------------------------- root 0 [ + ] root_driver root_driver firmware 0 [ ] psci |-- psci sysreset 0 [ ] psci-sysreset | `-- psci-sysreset simple_bus 0 [ + ] generic_simple_bus |-- soc ... tee 0 [ + ] optee |-- optee ... tee 1 [ ] optee `-- optee Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: core: remove redundant assignmentHeinrich Schuchardt
Variable count is initialized at the start of every round of the while loop and it is not used after the while loop. So there is no need to initialize it beforehand. Identified by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16dm: core: remove redundant if statementHeinrich Schuchardt
The value of parent is not changed in the first if statement. So we can merge the two if statements depending on parent. Indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16sandbox: p2sb: Silence compiler warningSimon Glass
Some compilers produce a warning about 'child' being used before init. Silence this by setting to NULL at the start. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16serial: Set baudrate on bootSean Anderson
Currently, the baud rate is never set on boot. This works ok when a previous bootloader has configured the baudrate properly, or when the baudrate is set to a reasonable default in the serial driver's probe(). However, when this is not the case, we could be using a different baud rate than what was configured. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-04-16x86: Move acpi_s3.h to include/acpi/Simon Glass
This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16dm: core: Add basic ACPI supportSimon Glass
ACPI (Advanced Configuration and Power Interface) is a standard for specifying information about a platform. It is a little like device tree but the bindings are part of the specification and it supports an interpreted bytecode language. Driver model does not use ACPI for U-Boot's configuration, but it is convenient to have it support generation of ACPI tables for passing to Linux, etc. As a starting point, add an optional set of ACPI operations to each device. Initially only a single operation is available, to obtain the ACPI name for the device. More operations are added later. Enable ACPI for sandbox to ensure build coverage and so that we can add tests. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16pci: Adjust dm_pci_read_bar32() to return errors correctlySimon Glass
At present if reading a BAR returns 0xffffffff then the value is masked and a different value is returned. This makes it harder to detect the problem when debugging. Update the function to avoid masking in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16dm: pci: Allow disabling auto-config for a deviceSimon Glass
Add a means to avoid configuring a device when needed. Add an explanation of why this is useful to the binding file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16tpm: Don't cleanup unless an error happensSimon Glass
At present the cleanup() method is called on every transfer. It should only be called on failing transfers. Fix this and tidy up the error handling a little. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16tpm: cr50: Use the correct GPIO bindingSimon Glass
This device should use ready-gpios rather than ready-gpio. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16tpm: cr50: Add a comment for cr50_privSimon Glass
Add a comment for the private structure Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16tpm: cr50: Release locality on exitSimon Glass
At present the cr50 driver claims the locality and does not release it for Linux. This causes problems. Fix this by tracking what is claimed, and adding a 'remove' method. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16cpu: Support querying the address widthSimon Glass
Different CPUs may support different address widths, meaning the amount of memory they can address. Add a property for this to the cpu_info struct. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16serial: ns16550: Provide UART base clock speed in ->getinfo()Andy Shevchenko
Some callers may need the UART base clock speed value. Provide it in the ->getinfo() callback. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16dm: serial: Add clock member to struct serial_device_infoAndy Shevchenko
Some callers of serial_getinfo() would like to know the UART base clock speed in order to make decision what to pass to OS in some cases. In particular, ACPI SPCR table expects only certain base clock speed and thus we have to act accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOCHeinrich Schuchardt
Function rsa_verify_key() is not called before relocation. So there is no need to load the UCLASS_MOD_EXP drivers before relocation. This avoid a failure to boot for pine64-lts_defconfig with CONFIG_RSA=y. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-15Merge tag 'u-boot-stm32-20200415' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Replace STM32MP1_TRUSTED by TFABOOT flag - Enable bootd, iminfo, imxtract on ST defconfig - Rename LEDs to match silkscreen on AV96 - Add KS8851-16MLL ethernet on FMC2 - Define FMC2 base address - net: dwc_eth_qos: implement reset-gpios for stm32 - net: dwc_eth_qos: implement phy reg and max-speed for stm32
2020-04-15configs: stm32mp1: replace STM32MP1_TRUSTED by TFABOOTPatrick Delaunay
Activate ARCH_SUPPORT_TFABOOT and replace the arch stm32mp specific config CONFIG_STM32MP1_TRUSTED by the generic CONFIG_TFABOOT introduced by the commit 535d76a12150 ("armv8: layerscape: Add TFABOOT support"). This config CONFIG_TFABOOT is activated for the trusted boot chain, when U-Boot is loaded by TF-A. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-15net: dwc_eth_qos: implement phy reg and max-speed for stm32Patrick Delaunay
Add management of property "reg" to configure @ of phy and also "max-speed" property to specify maximum speed in Mbit/s supported by the device Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15net: dwc_eth_qos: implement reset-gpios for stm32Christophe Roullier
Add management of property "reset-gpios" in the node identified by "phy-handle" to configure any GPIO used to reset the PHY. Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Reviewed-by: Patrice CHOTARD <patrice.chotard@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15watchdog: sp805_wdt: get platform clock from dt fileRayagonda Kokatanur
Get the watchdog platform clock from the DTS file using clk subsystem and use the same for calculating ticks in msec. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15watchdog: honour hw_margin_ms DT propertyRasmus Villemoes
Some watchdog devices, e.g. external gpio-triggered ones, must be reset more often than once per second, which means that the current rate-limiting logic in watchdog_reset() fails to keep the board alive. gpio-wdt.txt in the linux source tree defines a "hw_margin_ms" property used to specifiy the maximum time allowed between resetting the device. Allow any watchdog device to specify such a property, and then use a reset period of one quarter of that. We keep the current default of resetting once every 1000ms. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15watchdog: move initr_watchdog() to wdt-uclass.cRasmus Villemoes
This function is a bit large for an inline function, and for U-Boot proper, it is called via a function pointer anyway (in board_r.c), so cannot be inlined. It will shortly set a global variable to be used by the watchdog_reset() function in wdt-uclass.c, so this also allows making that variable local to wdt-uclass.c. The WATCHDOG_TIMEOUT_SECS define is not used elsewhere. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14Merge branch 'master' of git://git.denx.de/u-boot-marvellTom Rini
- Misc enhancements to Clearfog, including board variant detection (Joel) - Misc enhancements to Turris Mox, including generalization of the ARMADA37xx DDR size detection (Marek)
2020-04-14arm: mvebu: drivers/ddr: remove redundant assignmentHeinrich Schuchardt
The value of local variable ecc is immediately overwritten. So we can remove the first assignment. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14ddr: marvell: a38x: Allow boards to specify CK_DELAY parameterChris Packham
For some layouts it is necessary to adjust the CK_DELAY parameter to successfully complete DDR training. Add the ability to specify the CK_DELAY in the mv_ddr_topology_map. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2020-04-13Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2020-04-13Merge branch 'next'Tom Rini
Pull in changes that have been pending in our 'next' branch. This includes: - A large number of CI improvements including moving to gcc-9.2 for all platforms. - amlogic, xilinx, stm32, TI SoC updates - USB and i2c subsystem updtaes - Re-sync Kbuild/etc logic with v4.19 of the Linux kernel. - RSA key handling improvements
2020-04-13drivers: usb: host: Add BRCM xHCI driverRayagonda Kokatanur
Base driver for Broadcom xHCI controllers Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-04-13usb: Migrate to support live DT for some driverKever Yang
Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT. This patch updates usb_get_dr_mode() and usb_get_maximum_speed() to use ofnode as parameter instead of fdt offset. And all the drivers who use these APIs update to use live dt APIs at the same time. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-13usb: ehci-msm: Use dev interface to get device addressKever Yang
Use dev_read_addr_ptr() instead of devfdt_get_addr() so that we can support live DT. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-04-13usb: dwc3-of-simple: Drop redundant inclding header fileKever Yang
The fdtdec.h is no use in this file, remove the include code. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-12Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xxTom Rini
- Fixes DDR initialization failure on PowerPC boards like P3041DS, P4080DS
2020-04-10video: sunxi: Change sunxi_get_mon_desc() to not return NULL for the default ↵Bin Meng
case When building with gcc 9.2.0, the following build warning was seen: drivers/video/sunxi/sunxi_display.c: In function 'video_hw_init': drivers/video/sunxi/sunxi_display.c:1217:2: error: '%s' directive argument is null [-Werror=format-overflow=] Change sunxi_get_mon_desc() to not return NULL for the default case, to fix the compiler warning. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10Merge tag 'dm-pull9apr20' of git://git.denx.de/u-boot-dmTom Rini
Fixes segfault in 'dm drivers' command
2020-04-10Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"Biwen Li
This reverts commit 2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee. The commit breaks uboot boot (hang in ddr init) on many PowerPC boards like P3041DS, P4080DS Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-09dm: dump.c: Refactor dm_dump_drivers printsOvidiu Panait
Refactor the printing sequence in dm_dump_drivers to make it more clear. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-09dm: dump.c: Fix segfault when entry->of_match is NULLOvidiu Panait
Currently, dm drivers command produces a segfault: => dm drivers Driver Compatible -------------------------------- Segmentation fault (core dumped) This is caused by a NULL pointer dereference of entry->of_match. Add a check to prevent this. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org>
2020-04-09usb: Keep async schedule running only across mass storage xfersMarek Vasut
Rather than keeping the asynchronous schedule running always, keep it running only across USB mass storage transfers for now, as it seems that keeping it running all the time interferes with certain control transfers during device enumeration. Note that running the async schedule all the time should not be an issue, especially on EHCI HCD, as that one implements most of the transfers using async schedule. Note that we have usb_disable_asynch(), which however is utterly broken. The usb_disable_asynch() blocks the USB core from doing async transfers by setting a global flag. The async schedule should however be disabled per USB controller. Moreover, setting a global flag does not prevent the controller from using the async schedule, which e.g. the EHCI HCD does. This patch implements additional callback to the controller, which permits it to lock the async schedule and keep it running across multiple transfers. Once the schedule is unlocked, it must also be disabled. This thus prevents the async schedule from running outside of the USB mass storage transfers. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Tom Rini <trini@konsulko.com> Tested-by: Tom Rini <trini@konsulko.com> [omap3_beagle, previously failing]
generated by cgit (git 2.34.1) at 2025-01-05 18:26:05 +0000