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2020-02-10regulator: fix: Move code to enable gpio regulator to pre_probe from ↵Lukasz Majewski
ofdata_to_platdata The commit e8e9715df2d4 ("regulator: fixed: Modify enable-active-high behavior") fixed the regulator driver behavior when 'enable-active-high' is defined. Unfortunately, this patch used dm_regulator_platdata()'s "boot_on" member to set GPIOD_IS_OUT_ACTIVE flag and enable the regulator. The issue here is that regulator_common_ofdata_to_platdata() is called _before_ regulator_pre_probe() function in which the 'regulator-boot-on' property is asserted. As a result the GPIOD_IS_OUT_ACTIVE flag is not set and gpio_request_by_name() called in the former function is not enabling the regulator. This is problematic for e.g. i.MX ethernet driver, which then tries to perform initialization without power (and fails). The solution here is to explicitly enable regulator in regulator_pre_probe() callback only when 'regulator-boot-on' property is present in device tree. The GPIOD_IS_OUT_ACTIVE flag is not set at all, but relevant gpio is requested. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Tested-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-10Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Move P2SB from Apollo Lake to a more generic location - Add a function to find a device by drvdata in DM core - Enhancement of DM IRQ uclass driver - Add a clock driver for Intel devices - Add support for ACPI general-purpose events - Add a TPM driver for H1/Cr50 - Enable TPM on Google Chromebook Coral
2020-02-10Merge tag 'fixes-for-v2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix Coverity CID 280902 issue in vid_console_color() - fix vid_console_color() build warning - fix for mxsfb to ensure correct Linux logo position
2020-02-09misc: i2c_eeprom: set offset len and chip addr offset maskRobert Beckett
Set the correct offset length and chip address offset mask for each device to allow correct access to total capacity of the devices. Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09gpio: Let DM_74X164 be built without CONFIG_SPL_GPIOFabio Estevam
Since commit bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL") CONFIG_DM_74X164 is no longer built for mx7dsabresd_defconfig, as this target does not use CONFIG_SPL_GPIO. Remove such dependency and let the the 74X164 GPIO driver be built again. This restores Ethernet functionality on the imx7-sdb board as the Ethernet reset PHY comes from a GPIO driven by a 74LV595PW I/O expander. Fixes: bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-02-07serial: serial_cortina: add UART DM driver for CAxxxx SoCsJason Li
Add serial UART driver support for all Cortina Access CAxxxx family of SoCs. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07watchdog: cortina_wdt: add support for HW WDT on CAxxxx SoCsJason Li
Add support for hardware watchdog timer on all Cortina Access CAxxxx family of SoCs. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07gpio: cortina_gpio: add DM_GPIO driver for CAxxxx SoCsJason Li
DM_GPIO based GPIO controller driver for CAxxxx SoCs. This driver support multiple CPU architectures and Cortina Access SoC platforms. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07eth: mtk-eth: aarch64: fix build warnings on ethernet-driverFrank Wunderlich
building mtk ethernet driver for aarch64 (mt7622) results in warnings/errors "error: cast from pointer to integer of different size" Fixes: 23f17164d9 ("ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs") Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-02-07eth: mtk-eth: add mt7622 support in mediatek eth driverMarkLee
This patch add mt7622 support in mediatek eth driver Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-02-07eth: mtk-eth: add sgmii mode support in mediatek eth driverMarkLee
This patch add sgmii init part for the mediatek SoC that support sgmii mode. It is a must for mt7622. Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-02-07tpm: Add a driver for H1/Cr50Simon Glass
H1 is a Google security chip present in recent Chromebooks, Pixel phones and other devices. Cr50 is the name of the software that runs on H1 in Chromebooks. This chip is used to handle TPM-like functionality and also has quite a few additional features. Add a driver for this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-07dm: irq: Add support for requesting interruptsSimon Glass
At present driver model supports the IRQ uclass but there is no way to request a particular interrupt for a driver. Add a mechanism, similar to clock and reset, to read the interrupts required by a device from the device tree and to request those interrupts. U-Boot itself does not have interrupt-driven handlers, so just provide a means to read and clear an interrupt. This can be useful to handle peripherals which must use an interrupt to determine when data is available, for example. Bring over the basic binding file as well, from Linux v5.4. Note that the older binding is not supported in U-Boot; the newer 'special form' must be used. Add a simple test of the new functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07x86: Give each driver an IRQ typeSimon Glass
Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07dm: irq: Add support for interrupt controller typesSimon Glass
There can be different types of interrupt controllers in a system and some drivers may need to distinguish between these. In general this can be handled using the device tree by adding the interrupt information to device nodes. However on x86 devices we have interrupt controllers which are not tied to any particular device and not really used in U-Boot. These still need to be inited, so a convenient method is to give each controller a type and allow a particular controller type to be probed. Add support for this in sandbox along with a test. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove the new bland line at EOF of test/dm/irq.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07x86: Add a clock driver for Intel devicesSimon Glass
So far we have avoided adding a clock driver for Intel devices. But the Designware I2C driver needs a different clock (133MHz) on Intel devices than on others (166MHz). Add a simple driver that provides this information. This driver can be expanded later as needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07tegra: i2c: Change driver to use helper functionSimon Glass
Now that we have uclass_first_device_drvdata(), use it from the I2C driver to reduce code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07dm: core: Change syscon to use helper functionSimon Glass
Now that we have uclass_first_device_drvdata(), use it from syscon to reduce code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07dm: core: Add a function to find a device by drvdataSimon Glass
It is sometimes useful to find a device in a uclass using only its driver data. The driver data often indicates the 'subtype' of the device, e,g, via its compatible string. Add a function to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-06Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- Gen 5 and Watchdog fixes
2020-02-06video: enable VIDEO_ANSI and all VIDEO_BBP optionsAnatolij Gustschin
This partially reverts changes by commit 2cc393f32fd9 ("video: make BPP and ANSI configs optional") since it caused issues with other boards (missing LCD console output on pinebook, x86 platform or sandbox). Enable all disabled options again and opt out of not supported color depth in board defconfigs. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reported-by: Vagrant Cascadian <vagrant@debian.org>
2020-02-05Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Bug fixes on ls1012a, ls1021a, ls1028ardb platforms Integrate fspi for ls1028a, add DM-I2C support, update secure boot header offset
2020-02-05Merge tag 'rpi-next-2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi - DFU support file operations lager then the default max size - add dfu support to dwc2 for bcm2835 - enable DFU for RPi4 - Fix RPi4 memory map to include the genet device - add driver for the genet ethernet device - enable network support in RPi4 config
2020-02-05ddr: altera: Add DDR2 support to Gen5 driverMarek Vasut
Add DDR2 support to Gen5 DRAM driver. As the DDR2 macro names generated by Quartus are named differently than the DDR3 ones, use anon unions to store them in the same structures, without growing their size. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-02-05watchdog: designware: Optionally fetch clock and reset from DTMarek Vasut
Add optional support for fetching watchdog clock rate from DT and ungating reset via reset framework. This is optional as not all platforms using DW WDT support the clock and reset frameworks yet. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
2020-02-05watchdog: designware: Convert to DM and DT probingMarek Vasut
Convert the designware watchdog timer driver to DM and add DT probing support. Perform minor coding style clean up, like drop superfluous braces. These ought to be no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
2020-02-04video: mxsfb: call remove() when booting OSAnatolij Gustschin
Add DM_FLAG_OS_PREPARE flag to ensure that the driver's remove() callback is invoked before booting the kernel. This is required to stop the LCDIF controller. This was the behaviour with old driver without DM_VIDEO support. Without stopping the LCDIF we sometimes observe incorrect Linux logo position. Fixes: ae0760584b38 ("imx: mx6ul_14x14_evk: convert to DM_VIDEO") Signed-off-by: Anatolij Gustschin <agust@denx.de> Reported-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-02-04video: fix Coverity missing break issueAnatolij Gustschin
Fix: >>> CID 280902: Control flow issues (MISSING_BREAK) >>> The case for value "VIDEO_BPP32" is not terminated >>> by a 'break' statement. Also fix error: control reaches end of non-void function [-Werror=return-type] Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-02-04Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Various minor fixes for x86 - Switch to ACPI mode on Intel edison - Support run-time configuration for NS16550 driver - Update coreboot and slimbootloader serial drivers to use NS16550 run-time configuration - ICH SPI driver fixes to hardware sequencing erase case - Move ITSS from Apollo Lake to a more generic location - Intel GPIO driver bug fixes - Move to vs2017-win2016 platform build host for Azure pipelines
2020-02-04i2c: mxc_i2c: add DM_FLAG_PRE_RELOC flagBiwen Li
This adds DM_FLAG_PRE_RELOC flag to probe i2c driver before relocation Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04rtc: pcf8563: Add driver model supportBiwen Li
Add support of driver model of pcf8563 Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04gpio: intel_gpio: Fix register/bit offsets intel_gpio_get_value()Wolfgang Wallner
Fix the following in intel_gpio_get_value(): * The value of the register is contained in the variable 'reg', not in 'mode'. The variable 'mode' contains only the configuration whether the gpio is currently an input or an output. * The correct bitmasks for the input and output value are PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE. Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and PAD_CFG0_TX_STATE_BIT. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04gpio: intel_gpio: Clear tx state bit when setting outputWolfgang Wallner
Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32(). Otherwise this bit cannot be cleared again after it has been set once. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04gpio: intel_gpio: Pass pinctrl device to pcr_clrsetbits32()Wolfgang Wallner
The function pcr_clrsetbits32() expects a device with a P2SB parent device. In intel_gpio_direction_output() and intel_gpio_set_value() the device 'dev' is passed to pcr_clrsetbits32(), which is a gpio-controller with a device 'pinctrl' as parent. This does not match the expectations of pcr_clrsetbits32(). But the 'pinctrl' device has a P2SB as parent. Pass the 'pinctrl' device instead of the 'dev' device to pcr_clrsetbits32(). Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04watchdog: omap_wdt: Fix WDT coding styleMarek Vasut
Fix obvious coding style problems, no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Suniel Mahesh <sunil.m@techveda.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04watchdog: omap_wdt: Fix WDT reloadingMarek Vasut
The watchdog timer value was never updated in the hardware by this driver, so the watchdog triggered on some random stale value that was left in the hardware. The TI SPRUH37C says, quote: 20.4.3.9 Modifying Timer Count/Load Values and Prescaler Setting ... After a write access, the load register value and prescaler ratio registers are updated immediately, but new values are considered only after the next consecutive counter overflow or after a new trigger command (the WDT_WTGR register). This means at least one trigger must happen. The driver probably depended on someone calling it's .reset() callback, however that is not guaranteed e.g. if the WDT operates without servicing. Add this missing trigger. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Suniel Mahesh <sunil.m@techveda.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04watchdog: omap_wdt: Fix WDT timeout configurationMarek Vasut
The timeout parameter of omap3_wdt_start() is in miliseconds, while GET_WLDR_VAL() expects parameter in seconds. Fix this so the WDT driver is actually usable. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Suniel Mahesh <sunil.m@techveda.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04gpio: da8xx_gpio: Add "ti,keystone-gpio" compatibleVignesh Raghavendra
Add "ti,keystone-gpio" compatible so as be able to use Linux DT files as is. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04gpio: da8xx_gpio: Fix compiler warningVignesh Raghavendra
Fix below compiler warning for 64bit builds drivers/gpio/da8xx_gpio.c: In function ‘davinci_get_gpio_bank’: drivers/gpio/da8xx_gpio.c:446:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] return (struct davinci_gpio *)addr; Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04gpio: pca953x_gpio: Add support for 24 bit IO expanderVignesh Raghavendra
J721e EVM has a TCA6424 IO expander that has 24 GPIOs. Add support for the same Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04x86: Move itss.h from Apollo Lake to the generic x86 include directoryWolfgang Wallner
The code in this file is not specific to Apollo Lake. According to coreboot sources (where this code comes from), it is common to at least: * Apollo Lake * Cannon Lake * Ice Lake * Skylake Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04spi: ich: Drop while loop in hardware sequencing erase caseWolfgang Wallner
When ich_spi_exec_op_hwseq() is called to erase a 4k block (opcode = SPINOR_OP_BE_4K), it expects to find a length value in op->data.nbytes, but that value is always 0. As a result, the while loop is never executed and no erase is carried out. Fix this by dropping the loop code entirely, only keeping the relevant parts of the loop body. See http://patchwork.ozlabs.org/patch/1222779/ for more detailed background information and discussion. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04x86: serial: Add a coreboot serial driverSimon Glass
Coreboot can provide information about the serial device in use on a platform. Add a driver that uses this information to produce a working UART. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04serial: ns16550: Support run-time configurationSimon Glass
At present this driver uses an assortment of CONFIG options to control how it accesses the hardware. This is painful for platforms that are supposed to be controlled by a device tree or a previous-stage bootloader. Add a new CONFIG option to enable fully dynamic configuration. This controls register spacing, size, offset and endianness. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Aiden Park <aiden.park@intel.com> Tested-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: squashed in http://patchwork.ozlabs.org/patch/1232929/] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-03watchdog: designware: Migrate CONFIG_DESIGNWARE_WATCHDOG to KconfigMarek Vasut
Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig and update the headers accordingly, no functional change. The S10 enables the WDT only in SPL, but does not enable it in U-Boot itself, hence disable it in the config again. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2020-02-03reset: socfpga: Poll for reset status after deassert resetLey Foon Tan
In Cyclone 5 SoC platform, the first USB probing is failed but second probing is success. DWC2 USB driver read gsnpsid register right after de-assert reset, but controller is not ready yet and it returns gsnpsid 0. Polling reset status after de-assert reset to solve the issue. Retry with this fix more than 10 times without issue. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-02-02Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- DFU and Cadence USB 3 fixes
2020-02-02dfu: Add option to skip empty pages when flashing UBI images to NANDGuillermo Rodríguez
Add a new option to enable the DROP_FFS flag when flashing UBI images to NAND in order to drop trailing all-0xff pages. This is similar to the existing FASTBOOT_FLASH_NAND_TRIMFFS option. Signed-off-by: Guillermo Rodriguez <guille.rodriguez@gmail.com> Cc: Lukasz Majewski <lukma@denx.de>
2020-02-02usb: cdns3: ep0: Invalidate cache before reading Setup PacketVignesh Raghavendra
Invalidate dcache line before accessing Setup Packet contents. Otherwise driver will see stale content on non coherent architecture. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-02-01Merge tag 'u-boot-rockchip-20200130' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Support redundant boot for rk3399 - Support binman for rockchip platform - Update ram driver and add ddr4 support for rk3328
generated by cgit (git 2.34.1) at 2025-02-05 11:33:52 +0000