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2012-09-17mxc nand: Homogenize IP revisions with LinuxBenoît Thébaudeau
Use the same IP revisions as in Linux in order to make the comparison more clear. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mtd mxc nand: Merge init functionsBenoît Thébaudeau
Merge mxc_setup_config1() into board_nand_init() in order to ease the addition of i.MX5 support in the following patches. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mtd mxc nand: Fix ECC state after read_page_raw_syndrome()Benoît Thébaudeau
mxc_nand_read_page_raw_syndrome() should reenable ECC upon exit. This fixes ECC errors left uncorrected after a call to this function. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mtd mxc nand: Use _mxc_nand_enable_hwecc()Benoît Thébaudeau
Use _mxc_nand_enable_hwecc() instead of duplicating its code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mxc nand: Access all ecc_status_result fieldsBenoît Thébaudeau
On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2 consecutive 16-bit registers. This patch reads all the fields of this value, which makes a difference for 4-kiB NF pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mxc nand: cosmectic: Light cleanupBenoît Thébaudeau
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mxc nand: Merge mtd and spl register definitionsBenoît Thébaudeau
This patches fixes the TODO to use same register definitions in mtd mxc_nand and nand_spl fsl nfc drivers. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driverMarek Vasut
This is based on Linux kernel -next: commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b Author: Brian Norris <computersforpeace@gmail.com> Date: Fri Jul 13 09:28:24 2012 -0700 mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It silently masks off at least one flag that might be set by the driver (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly others. Really, as long as driver writers exercise a small amount of care with NAND_* options, this mask is not necessary at all; it was only here to prevent certain options from accidentally being set by the driver. But the original thought turns out to be a bad idea occasionally. Thus, kill it. Note, this patch fixes some major gpmi-nand breakage. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17nand: Make NAND lock status compatible with MicronJoe Hershberger
Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not the same as others. Instead of bit 1 being lock, it is #lock_tight. To make the driver support either format, ignore bit 1 and use only bit 0 and bit 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17nand: consolidate duplicated constantsJoe Hershberger
NAND_CMD_ constants for lock/unlock should be in the header Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17nand: Change ulong to loff_t and size_tJoe Hershberger
Missed in previous cleanup. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17nand: Add support for unlock.invertJoe Hershberger
NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17mtd: support ONFI multi lun NANDMatthieu CASTET
With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> [scottwood@freescale.com: picked from Linux into U-Boot] Reported-by: Rafael Beims <rafael.beims@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini
2012-09-17spiflash: at25: using common spi flash operationBo Shen
Using common spi flash operation function to replace private operation funtion Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-17spi: add atmel at25df321 serial flash supportBo Shen
Add atmel at25df321 serial flash support Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-13atmel_nand: fix the U-Boot output information about nand flash with PMECC ↵Wu, Josh
enable. Before the patch, it looks like: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: Initialize PMECC params, cap: 2, sector: 512 > |256 MiB |MMC: mci: 0 |In: serial |Out: serial |Err: serial |Net: macb0 |Hit any key to stop autoboot: 0 After the patch: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: 256 MiB | ... ... |Hit any key to stop autoboot: 0 Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-12Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini
2012-09-11spi: xilinx: Remove unused variableStephan Linz
Warning is: xilinx_spi.c: In function 'spi_setup_slave': xilinx_spi.c:81: warning: unused variable 'regs' Signed-off-by: Stephan Linz <linz@li-pro.net> CC: Michal Simek <monstr@monstr.eu>
2012-09-11serial: uartlite: Init all uartlites for serial multiMichal Simek
Initialize all possible uartlites and return the first initialized port. For static configuration is initialization done in userial_ports array. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Stephan Linz <linz@li-pro.net>
2012-09-11block: systemace: Simplify base and width initializationMichal Simek
Use CONFIG parameters only at one location to simplify the code. Also create ace_readw/writew functions. Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-09-10NAND: MXS: include common.h first so cache.h is included in correct orderTom Warren
With Simon Glass's include/nand.h alignment changes, some mxs builds were generating errors. Fix is to ensure asm/cache.h is included before linux/mtd/nand.h. Moving common.h to top of include list does that. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
2012-09-10Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2012-09-07mmc: detect boot sectors using EXT_CSD_BOOT_MULT tooStephen Warren
Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set. Note that the Linux kernel enables access to boot partitions solely based on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only influences access to "general" partitions. eMMC devices affected by this issue exist on various NVIDIA Tegra platforms (and presumably many others too), such as Harmony (plug-in eMMC), Seaboard, Springbank, and Whistler (plug-in eMMC). Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07tegra: nand: Add Tegra NAND driverJim Lin
A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07nand: Try to align the default buffersSimon Glass
The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-06mmc: Remove incorrect cmd->flags usageAndy Fleming
There were a couple of drivers that were actually using the flags field of the cmd structure, despite the fact that no one ever *set* that field. When we removed the field, those drivers failed to compile. Replaced the references with the correct usage of resp_type. Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-06MX28: MMC: Avoid DMA DCache race conditionMarek Vasut
This patch prevents dcache-related problem. The problem manifested itself on the SPI driver, this is just a port to the MMC driver. The scenario is the same. In case an "mmc read" is issued to a buffer which was written right before it and data cache is enabled, the cache eviction might happen during the DMA transfer into the buffer, therefore corrupting the buffer. Clear any cache lines that might contain the buffer to prevent such issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
2012-09-06MX28: SPI: Fix the DMA chainingMarek Vasut
It turns out that in order for the SPI DMA to properly support continuous transfers longer than 65280 bytes, there are some very important parts that were left out from the documentation. Firstly, the XFER_SIZE register is not written with the whole length of a transfer, but is written by each and every chained descriptor with the length of the descriptors data buffer. Next, unlike the demo code supplied by FSL, which only writes one PIO word per descriptor, this does not apply if the descriptors are chained, since the XFER_SIZE register must be written. Therefore, it is essential to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are written with zero, since they don't apply. The DMA programs the PIO words in an incrementing order, so four PIO words. Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC must not be set during the whole transfer, but it must be set only on the last descriptor in the chain. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
2012-09-06MX28: SPI: Fix the DMA DCache race conditionMarek Vasut
This patch fixes dcache-related problem. The problem manifested when dcache was enabled and the following command issued twice: mw 0x42000000 0 0x4000 ; sf probe ; sf read 0x42000000 0x0 0x10000 ; sha1sum 0x42000000 0x10000 The SHA1 checksum was correct during the first call. Yet with every subsequent call of the above command, it differed and was wrong. It turns out this was because of a race condition. On the first time the command was called, no cacheline contained any data from the destination memory location. The DMA transfered data into the location and the cache above the location was invalidated. Then the checksum was computed, but that meant the data were loaded into data cache. On any subsequent call, the DMA again transfered data into the same destination. Yet during the transfer, some of the DCache lines were evicted and written back into the main memory. Once the DMA transfer completed, the data cache was invalidated over the memory location as usual. But the data that were to be loaded back into the data cache by subsequent SHA1 checksuming were corrupted. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
2012-09-06omap4 i2c: add support for i2c bus 4Koen Kooi
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
2012-09-05mmc: s5p_sdhci: add the set_mmc_clk for cmu controlJaehoon Chung
Samsung SoC use the cmu control to set clock. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: s5p_sdhci: fixed wrong function argumentJaehoon Chung
Useless code is removed, and get buswidth value. buswidth value will be used to choice the 4bit or 8bit. (Now used 4bit mode in sdhci.c by default) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: s5p_sdhci: set the SDHCI_QUIRK_BROKEN_R1BJaehoon Chung
Samsung SoC is broken busy waiting for R1b type. And clk delay control value is modified the previosuly value. (that value used at the s5p_mmc.c) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: Add a SDHCI quirk for boards that have no CDJoe Hershberger
Some boards have no Card Detect wired. In that case, set the CD test bits in the standard interface. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: Fix version check for clock API in sdhci driverJoe Hershberger
When setting up the clocks in the sdhci driver, the "spec version" must be masked off. Otherwise any time the vendor version is not 0, the check will allways assume the interface is version 3. This breaks when the interface is actually version 1 or 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc_get_dev: Return error if mmc_init failsBenoît Thébaudeau
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: detect boot sectors using EXT_CSD_BOOT_MULT tooStephen Warren
Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set. Note that the Linux kernel enables access to boot partitions solely based on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only influences access to "general" partitions. eMMC devices affected by this issue exist on various NVIDIA Tegra platforms (and presumably many others too), such as Harmony (plug-in eMMC), Seaboard, Springbank, and Whistler (plug-in eMMC). Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05MMC: u-boot-spl may be compiled without partition supportMikhail Kshevetskiy
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: fix capacity calculation when EXT_CSD_SEC_CNT is usedYoshihiro Shimoda
Since the type of "ext_csd" was array of char, the following calculation might fail when the value of ext_csd[EXT_CSD_SEC_CNT] was minus. capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; So, this patch changes the type of "ext_csd" to array of u8. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: sh_mmcif: enable MMC_MODE_HCYoshihiro Shimoda
The controller can control high capacity cards. So, the patch adds the flag. If the flag is not set, "mmcinfo" will fail when a high capacity card is used. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-05mmc: fix wrong timeout check in mmc_send_status()Jongman Heo
(!timeout) condition check in mmc_send_status() can never be met, because do-while loop ends up with negative timeout value, -1. Fix the check to handle TIMEOUT case correctly. Signed-off-by: Jongman Heo <jongman.heo@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-09-04video: drop duplicate set of DISPC_CONFIG registerStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04Merge branch 'master' of git://git.denx.de/u-boot-avr32Wolfgang Denk
* 'master' of git://git.denx.de/u-boot-avr32: net:macb: add line break avr32:portmux: fix setup for macb1 avr32: Remove redundant LDSCRIPT definition Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-09-03net:macb: add line breakAndreas Bießmann
Without this patch we see annoying output like this: ---8<--- U-Boot> dhcp macb1: PHY not foundmacb0: PHY present at 1 macb0: Starting autonegotiation... --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Joe Hershberger <joe.hershberger@gmail.com>
2012-09-03kw_spi: fix clock prescaler computationValentin Longchamp
The computation was not correct with low clock values: setting a 1MHz clock would result in an overlap that would then configure a 25Mhz clock. This patch implements a correct computation method according to the kirkwood functionnal spec. table 600 (Serial Memory Interface Configuration Register). Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03cfi: Make the flash erase and write operations abortableJoe Hershberger
Check for ctrlc() in operations that take time and loop over the flash addresses. In netconsole, tstc() is expensive. Only check once in a while to not slow down the operation significantly. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-09-03cfi: Check for blank before eraseJoe Hershberger
Added an optional check in the CFI driver to evaluate if the sector is already blank before issuing an erase command. Improves erase time by over a factor of 10 if already blank. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-09-02input: key_matrix: fix header inclusionStephan Linz
On Microblaze with device tree support enabled we run into the error below. I'm not sure, but I think that all source code should include at least the common.h and just this fix the problem on Microblaz architecture. The error is: In file included from key_matrix.c:29: include/malloc.h:364: error: conflicting types for 'memset' include/linux/string.h:71: error: previous declaration of 'memset' was here include/malloc.h:365: error: conflicting types for 'memcpy' include/linux/string.h:74: error: previous declaration of 'memcpy' was here Signed-off-by: Stephan Linz <linz@li-pro.net> CC: Bernie Thompson <bhthompson@chromium.org> CC: Simon Glass <sjg@chromium.org> CC: Tom Warren <twarren@nvidia.com> CC: Michal Simek <monstr@monstr.eu> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <monstr@monstr.eu>
2012-09-02rtc: pcf8563: Make century compatible with LinuxBenoît Thébaudeau
This driver uses the century bit of this RTC in the opposite way Linux does. From Linux's rtc-pcf8563.c: /* * The meaning of MO_C bit varies by the chip type. * From PCF8563 datasheet: this bit is toggled when the years * register overflows from 99 to 00 * 0 indicates the century is 20xx * 1 indicates the century is 19xx * From RTC8564 datasheet: this bit indicates change of * century. When the year digit data overflows from 99 to 00, * this bit is set. By presetting it to 0 while still in the * 20th century, it will be set in year 2000, ... * There seems no reliable way to know how the system use this * bit. So let's do it heuristically, assuming we are live in * 1970...2069. */ As U-Boot's PCF8563 driver does not say it is supposed to support the RTC8564, make this driver compatible with Linux's by giving the opposite meaning to the century bit. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de>
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