| Age | Commit message (Collapse) | Author |
|---|
|
Fix a cast that causes warnings on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
We should consistently use %z with size_t, and avoid passing a uint32_t as
a size_t value. Fix these issues to avoid warnings on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
For 64-bit x86, __I386__ should perhaps not be defined. It is not clear from
the definition, but let's use CONFIG_X86 to be sure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
Fix a cast that causes warnings on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
Update the samus driver to avoid the direct call to the video BIOS setup.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
At present we use the legacy vesa driver for graphics. Add a driver which
supports driver model. This can be probed only when needed, removing the
need to start up the display if it is not used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
Provide a function to run the Vesa BIOS for a given PCI device and obtain
the resulting configuration (e.g. display size) for use by the video
uclass. This makes it easier to write a video driver that uses vesa and
supports driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
'enabled' should be 'enables'. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
It is useful in debug() statements to display the name of the uclass for a
device. Add a simple function to provide this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
This makes the assumption that setting up pinctrl in cpu_init_r() is safe.
On samus we need GPIOs before relocation in order to support power control.
This commit fixes the following message on boot:
initcall sequence ffe5c6f4 failed at call ffe01d3d (err=-1)
### ERROR ### Please RESET the board ###
In any case it seems better to leave init to driver model, so that it can
pick up the GPIO driver when it needs it. Since pinctrl is a dependency of
the GPIO driver, we may as well put the dependency there and avoid these
problems.
This reverts commit 9769e05bcf79939bad23a719982dd1f85a110f3c.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
Fix a cast that causes warnings on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
According to the binding documentation the fixed regulator enable GPIO
is optional. However so far registration thereof failed if no enable
GPIO was specified. Fix this by making it entirely optional whether an
enable GPIO is used.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
|
Fix spelling of debug message from cnnot to cannot.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
|
|
Use the generic error number instead of meaningless value.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
"host->version" isn't a SoC specific value.
It doesn't need to get in each SoC drivers.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
Some arguments don't need to pass to dwmci_setup_cfg.
They are already included in dwmci_host structure.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This patch support the driver model for s5p_sdhci controller.
To support the legacy model, maintained the existing code.
Note: If use the Driver Model, it needs to modify the device-tree.
In future, will update the Device-tree and enable the configuratioin.
(CONFIG_BLK, CONFIG_DM_MMC and CONFING_DM_MMC_OPS)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
At present erase is not suported with CONFIG_DM_OPS. Add it so that MMC
devices can be erased.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
This is the initial commit for UniPhier reset controller driver.
Most code was ported from Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
This commit fixes an issue where data is written to an
invalid memory location.
The issue has been introduced in commit
(88364387 cros: add cros_ec_driver)
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Add command to print out the flash info as reported by the
ec. The data read back includes size, write block size,
erase block size.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
|
|
Add support for reading back flash parameters as reported by
the ec.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
|
|
|
|
By default saveenv option is not supported for SPL. This patch
enable the support for save environment variable for SPL build.
Enable save environment support in SPL after setenv. By default
the saveenv option is not provided in SPL, but some boards need
this support in 'Falcon' boot, where SPL need to boot from
different images based on environment variable set by OS. For
example OS may set "reboot_image" environment variable to
"recovery" inorder to boot recovery image by SPL. The SPL read
"reboot_image" and act accordingly and change the reboot_image
to default mode using setenv and save the environemnt.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Simon Glass <sig@chromium.org>
change in v1:
- dropped SUPPORT, use CONFIG_SPL_SAVEENV
- updates the comments in mmc_private.h
|
|
Boards where ECs that use a I2C port != 0 specify this in the
devicetree file via the google,remote-bus property.
Previously this was ignored and hardcoded to port 0.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>
|
|
This reverts commit 82f5279b0cd99a9163d34cfe926d0316d9dc0d37.
The build failure of k2*evm boards was fixed in a different way by
the previous commit. It is nasty to patch generic drivers around
with #ifdef CONFIG_CLK just for the KeyStone's matter.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used
on Colibri iMX7.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
It is not usual that drivers announce when they have been initialized.
use dev_dbg to announce device initialization.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Support instatiation through device tree. Also parse the fsl,dte-mode
property to determine whether DTE mode shall be used.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Acked-by: Heiko Schocher <hs@denx.de>
|
|
Fix various misspellings of:
* deprecated
* partition
* preceding,preceded
* preparation
* its versus it's
* export
* existing
* scenario
* redundant
* remaining
* value
* architecture
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
|
The endianness can be changed by RCW + PBI sequence. It may have
other than power on reset value.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Yuan Yao <yao.yuan@nxp.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
|
|
Update the ext loader to avoid using the spl_image global variable.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
At present there are two SPI functions only used by freescale which are
defined in the spi_flash.h header. One function name matches an existing
generic SPL function.
Move these into a private header to avoid confusion.
Arcturus looks like it does not actually support SPI, so drop the SPI code
from that board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
Add a linker list declaration for this method and remove the explicit
switch() code. Also set up the sunxi function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
All the other SPL loaders are in this directory, so move the SPI one in
there too.
There are two board-specific SPI loaders (fsl and sunxi). These remain in
the drivers/mtd/spi directory, since they do not contain generic code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
At present some spl_xxx_load_image() functions take a parameter and some
don't. Of those that do, most take an integer but one takes a string.
Convert this parameter into a struct so that we can pass all functions the
same thing. This will allow us to use a common function signature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
Instead of using the global spl_image variable, pass the required struct in
as an argument.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
Update the API's for transition of Security Monitor states. Instead
of providing both initial and final states for transition, just
provide final state for transition as Security Monitor driver will
take care of it internally.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
[York Sun: Reformatted commit message slightly]
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
When calling clk_get_by_index(), fall back to the legacy method of
getting the clock if -ENOENT is returned.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
|
|
Need to initialize mmc->dev when probe, or will met
"dev_get_uclass_priv: null device", when `mmc dev 1`.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
There two iomuxc for i.MX6ULL. one iomuxc is compatible is i.MX6UL,
the other iomuxc is for SVNS usage, similar with the one in mx7.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
|
|
i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8,
while other banks use 256 bits. So we have to adjust the
word and bank index when accessing the bank 8.
When in command line `fuse read 8 0 1`, you can image
`fuse read 7 4 1` in the ocotp driver implementation for 6ULL.
When programming, we use word index, so need to fix bank7/8 programming
for i.mx6ull.
For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67.
But actully it should be (7 << 3 | 7) ---> 63.
So fix it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
|
|
Currently the driver asserts WDOG_B by clearing WCR_WDA bit when
enabling the watchdog. Do not clear WCR_WDA.
Signed-off-by: Ross Parker <rossjparker@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
|
|
|
|
add driver support for pwm regulator.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
|
when using tftp on the smartweb board, it prints a lot of
CACHE: Misaligned operation at range [23b2e000, 23b2e100]
warnings ... fixed them.
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
Creating multiple entries of "config FOO" often gives us bad
experiences. In this case, we should specify "default X86"
as platforms that want this keyboard by default.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
include/configs/dra7xx_evm.h
|
|
Apply the erratum A006261 for the following Socs:
P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1
Do not apply erratum A006261 for the following Socs:
T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081
Erratum A006261 is applicable for the following Socs:
P1010(1.0, 2.0), P2041(1.0, 1.1, 2.0, 2.1), P2040(1.0, 1.1, 2.0, 2.1),
P3041(1.0, 1.1, 2.0, 2.1), P5010(1.0, 2.0), P5020(1.0, 2.0),
P5021(1.0, 2.0), T4240(1.0, 2.0), P5040(1.0,2.0,2.1).
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
