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2017-11-28Merge git://git.denx.de/u-boot-usbTom Rini
2017-11-28usb: r8a66597: Add support for RZ/A seriesChris Brandt
While the USB HW in the RZ/A is basically the same, there are some differences from the original versions that were in the SH SoCs. Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
2017-11-27Merge git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27pinctrl: imx6ul: Fix pinctrl data overlapped with DT areaJagan Teki
before relocation pinctrl data BSS is overlapping DT area, when .data is using uninitialized global variable, imx6_pinctrl_soc_info. So assign them flags ZERO_OFFSET_VALID to prevent BSS overlap Suggested-by: Lokesh Vutla <lokeshvutla@ti.com> Reported-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-26Trigger watchdog before calling usb_gadget_handle_interruptsVincent Prince
This prevents board resets when calling sdp command on boards which have a watchdog. Signed-off-by: Vincent Prince <vincent.prince.fr@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2017-11-26usb: gadget: storage: Increase FSG_BUFLENMarek Vasut
Increase the buffer length to be just above maximum permissible value of 128 kiB . This increases the performance of the UMS and alike by a factor of 2 - 2.5 as the buffers are less fragmented. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <lukma@denx.de>
2017-11-26usb: ehci: do not invalidate a NULL bufferDirk Behme
Its a valid use case to call ehci_submit_async() with a NULL buffer with length 0. E.g. from usb_set_configuration(). As invalidate_dcache_range() isn't able to judge if the address NULL is valid or not (depending on the SoC hardware configuration it might be valid) do the check in ehci_submit_async() as here we know that we don't have to invalidate such a buffer. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
2017-11-26dm: usb: ehci: avoid possible NULL dereferenceHeinrich Schuchardt
Currently we check in ehci_shutdown() if ctrl is NULL after dereferencing it. Before this we have already dereferenced ctrl, ctrl->hccr, and ctrl->hcor in ehci_get_portsc_register(), ehci_submit_root(), and hci_common_init(). A better approach is to already check ctrl, ctrl->hccr, and ctrl->hcor during the initialization in ehci_register() and usb_lowlevel_init() and signal an error here via the return code. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-26usb: xhci: Add Renesas R-Car xHCI driverMarek Vasut
Add firmware V3, firmware loader and XHCI glue for the Renesas R-Car Gen3 SoCs XHCI controller. Thus far only the R-Car Gen3 R8A7795 ES2.0+ and R8A7796 are supported. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2017-11-26usb: ehci: Fix accessors for big-endian platforms and descriptorsAlexey Brodkin
Commit 9000eddbae0d ("drivers/usb/ehci: Use platform-specific accessors") broke USB 2.0 on big-endian platforms because for them writel/readl() does automatic conversion of BE data to LE. Proper implementation requires to use "raw" variant of these accessors which read/write data without messing with endianess. While at it replace cpu_to_be32() to be32_to_cpu() in readl() to keep sane semantics. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Marek Vasut <marex@denx.de> Reported-by: Vladimir Boroda <boroda@yahoo.com>
2017-11-26rockchip: pinctrl: rk3399: add support for I2C8Philipp Tomsich
The RK3399 has a total of 9 I2C controllers. To support these, the enum in periph.h is extended and the mapping from the IRQ numbers to the peripheral-ids is extended to ensure that pinctrl requests are passed through to the function configuring the I2C pins. For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using communication with the FAN53555 connected on I2C8. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-11-26rockchip: clk: rk3399: change extract_bits to bitfield_extractPhilipp Tomsich
The RK3399 clk driver still has a left-over use of extract_bits, which can be replaced by using bitfield_extract from include/bitfield.h. This rewrites the invocation to use the shared function. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-24ARC: HSDK: introduce CREG GPIO driverEugeniy Paltsev
The HSDK can manage some pins via CREG registers block. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-11-21rockchip: spi: the symbol for Hertz is HzHeinrich Schuchardt
fix typo Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21rockchip: clock: update sysreset driver bindingKever Yang
Using priv for new sysreset driver binding. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21rockchip: sysreset: update Makefile to work with merged sysreset driverPhilipp Tomsich
After applying the merged sysreset driver, there are build failures due to an out-of-sync Makefile. This updates drivers/sysreset/Makefile to address these build failures. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21rockchip: sysreset: merge into one common driverKever Yang
Use a common driver for all Rockchip SOC instead of one for each SoC. Use driver_data for reg offset. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21thermal: ti-bandgap: Add support for temperature sensorFaiz Abbas
The dra7xx series of SOCs contain a temperature sensor and an associated analog-to-digital converter (ADC) which produces an output which is proportional to the SOC temperature. Add support for this temperature sensor. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-20omap3: spi: the symbol for Hertz is HzHeinrich Schuchardt
fix typo Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20Merge git://git.denx.de/u-boot-ubiTom Rini
2017-11-20Merge git://git.denx.de/u-boot-i2cTom Rini
2017-11-20ubi: no NULL check needed before kmem_cache_destroyHeinrich Schuchardt
kmem_cache_destroy calls free which checks for NULL. Problem was indicated by coccinelle. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-11-20i2c: add Amlogic Meson driverBeniamino Galvani
Add a driver for the I2C controller available on Amlogic Meson SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
2017-11-20rtc: add support for s35392aNandor Han
Add support for S35392A RTC. The driver supports both U-Boot driver models. Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Cc: Heiko Schocher <hs@denx.de>
2017-11-20bootcount: add support for bootcounter on EXT filesystemIan Ray
Add support for bootcounter on an EXT filesystem. Sync configuration whitelist. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
2017-11-20pwm: imx: Enable PWM support on i.MX53Martyn Welch
Add missing parts for i.MX53 PWM support Acked-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2017-11-20imx: mxc_i2c: tweak the i2c transfer methodNandor Han
Tweak the i2c transfer to work for devices that want to read data without addressing a register. Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk> Acked-by: Heiko Schocher <hs@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2017-11-19Merge git://git.denx.de/u-boot-dmTom Rini
2017-11-17dm: pci: change bus number register setting compliant with LinuxMinghuan Lian
This patch is to change U-Boot PCI bus assignement compliant with Linux. It means each PCIe controller's bus number is 0, not the current maximum PCI bus number, when start to scan this controller. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-17serial: nulldev: Implement "pending" function to fix tstc return "true"Wilson Lee
In U-boot, serial_tstc was use to determine is there have a character in serial console that pending for read. If there is no "pending" function implemented in serial driver, the serial-uclass will return "true(1)" to indicate there have a character pending to read. Thus, read a character from nulldev serial will result in continuous getting -EAGAIN return which might lead system to hang. This commit is to fix a bug in nulldev serial which implement "pending" function in nulldev serial to always indicate there is no character in console that pending for read. Signed-off-by: Wilson Lee <wilson.lee@ni.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com> Cc: Bin Meng <bmeng.cn@gmail.com>
2017-11-17clk: clk_stm32f7: fix PLL clock division factorPatrice Chotard
Fix clock division factor initialization for RCC_PLLCFGR registers. PLLR bits (bit 31-28) in RCC_PLLCFGR must not be cleared, it's a forbidden value. So update RCC_PLLCFGR using clrsetbits_le32() to set only necessary bits fields. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-17mmc: arm_pl180_mmci: add .getcd callbackPatrice Chotard
Add .getcd callback to check is MMC card is present Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17mmc: arm_pl180_mmci: add clock supportPatrice Chotard
Allow to get and enable MMC related clock Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17mmc: arm_pl180_mmci: add bus_width DT property supportPatrice Chotard
Allow to get "bus-width" property from device tree Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17mmc: arm_pl180_mmci: adapt driver to DM usagePatrice Chotard
Convert this driver to driver model. This driver is also used by VEXPRESS platforms which doesn't use driver model. Tested on STM32F746 and STM32F769 platforms. Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17mmc: arm_pl180_mmci: update arm_pl180_mmci_init() prototypePatrice Chotard
Update arm_pl180_mmci_init() prototype by adding struct mmc** param. This is needed before converting this driver to driver model in order to use arm_pl180_mmci_init() in driver model and in none driver model implementation Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2017-11-17omap2: nand: Make NAND_OMAP_GPMC_PREFETCH defaultTom Rini
This option provides better performance and should really always be enabled. Make this be default y. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2017-11-17net: phy: Add Amlogic Meson GXL Internal PHY supportNeil Armstrong
The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY. The PHY acts as a generic PHY but needs a slight configuration right before it's configuration. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-11-17pinctrl: meson: Add GXL SupportNeil Armstrong
Add the Amlogic Meson GXL pinctrl support based on the GXBB driver and the synchronized DTS from Linux 4.13.5 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
2017-11-16dm: core: Correct address cast in dev_read_addr_ptr()Simon Glass
This currently causes a warning in sandbox and will not do the right thing: drivers/core/read.c: In function ‘dev_read_addr_ptr’: drivers/core/read.c:64:44: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr; Use map_sysmem() which is the correct way to convert an address to a pointer. Fixes: c131c8bca8 (dm: core: add dev_read_addr_ptr()) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-16Merge git://www.denx.de/git/u-boot-marvellTom Rini
2017-11-16mvebu: usb: xhci: a38x supportJon Nettleton
This makes the initial changes need to support the a38x series of SOCs. It adds the device-tree identifier as well as changing the board_support function to take the IO address designated by device-tree. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: use fdt_addr_t; update 37xx and 8K implementations] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2017-11-16pci: mvebu: Increase size of PCIe default mappingVlaoMao
Increase size PCI memory mapping from 32MiB to 128MiB. Signed-off-by: VlaoMao <vlaomao@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-11-15driver: net: fsl-mc: Use base 16 in simple_strtoulPrabhakar Kushwaha
Value provided in MC_MEM_SIZE_ENV_VAR is in hex. Use 16 as base in simple_strtoul. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-14mtd: nand: fsl-ifc: fix support of multiple NAND devicesKurt Kanzenbach
Currently the chipselect used to identify the corresponding NAND chip is stored at the controller and only set during fsl_ifc_chip_init(). This way, only the last NAND chip is working, as the previous value of cs_nand gets overwritten. In order to solve this issue the chipselect is computed on demand by evaluating the bank variable. Thus, the correct chipselect for each NAND chip operation is used. Tested on hardware with two NAND chips connected to the IFC controller. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Acked-by: Scott Wood <oss@buserror.net> [YS: reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-14drivers: net: ldpaa_eth: Correct error handler for qbman_swp_acquire()Ashish Kumar
The zero value returned from qbman_swp_acquire() is an error condition meaning no free buffer for allocation. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kushwaha Prabhakar <prabhakar@freescale.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-11-10net: sun8i_emac: Fix build for non-H3/H5 SoCsChen-Yu Tsai
Only the H3/H5 SoCs have an internal PHY and its related clock and reset controls. Use an #ifdef to guard the internal PHY control code block so it can be built for other SoCs, such as the A83T or A64. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-09Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2017-11-09sunxi: restore PHYLIB for CONFIG_SUN4I_EMAC usersArtturi Alm
due misnaming of CONFIG_SUN4I_EMAC in include/configs/sunxi-common.h, likely missed in: commit 3146f0c017df ("Move PHYLIB to Kconfig") Signed-off-by: Artturi Alm <artturi.alm@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-09sunxi: fix CONFIG_SUNXI_EMAC referencesArtturi Alm
fixes CONFIG_SUNXI_EMAC references from drivers/net/Makefile and include/configs/sunxi-common.h likely forgotten in: commit abc3e4df59f5 ("sunxi: Convert SUNXI_EMAC to Kconfig") Signed-off-by: Artturi Alm <artturi.alm@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com>