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2019-02-07spi: Add non DM version of SPI_MEMVignesh R
Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07spi: spi-mem: Claim SPI bus before spi mem accessVignesh R
It is necessary to call spi_claim_bus() before starting any SPI transactions and this restriction would also apply when calling spi-mem operations. Therefore claim and release bus before requesting transfer via exec_op. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer sizeVignesh R
Extend spi_mem_adjust_op_size() to take spi->max_write_size and spi->max_read_size into account. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modesVignesh R
SPI controllers support all types of SPI modes including dual/quad bus widths. Therefore remove constraint wrt SPI mode from spi-mem layer. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-05Merge git://git.denx.de/u-boot-marvellTom Rini
- Move Armada XP / 38x PCIe driver to DM_PCI from me - Move Armada XP / 38x LCD driver to DM_VIDEO from me - Add uDPU board (Armada-3720) from Vladimir [trini: Fix warning in pci-uclass.c by removing ret from pci_uclass_child_post_bind as it no longer calls functions with a return code to catch.] Signed-off-by: Tom Rini <trini@konsulko.com>II
2019-02-05video: Armada XP: Move driver to DM_VIDEOStefan Roese
This patch moves the Armada XP video / LCD driver to DM_VIDEO. With this move, the legacy interface board_video_init() is removed from the theadorable board code (only user of this video driver). The support via DT will be added in a separate patch. This patch also enables DM_VIDEO for the theadorable board, as this is needed to not break git bisect'ability. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
2019-02-05pci: pci_mvebu: Add DM_PCI support and move CONFIG_PCI_MVEBU to defconfigStefan Roese
This patch adds DM_PCI support to the MVEBU PCIe driver. This is necessary, since all PCI drivers have to be moved to DM (driver model) until the v2019.07 release. To not break git bisect'ablility, this patch also moves CONFIG_PCI_MVEBU from config headers to the defconfig files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Phil Sutter <phil@nwl.cc> Cc: Marek Behún <marek.behun@nic.cz> Cc: VlaoMao <vlaomao@gmail.com>
2019-02-05pci: Add pci_get_devfn() to extract devfn from the fdt_pci_addrStefan Roese
This function will be used by the Marvell Armada XP/38x PCIe driver, which is moved to DM right now. So let's extract the functionality from pci_uclass_child_post_bind() to make it available. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-02Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchipTom Rini
u-boot-rockchip changes for 2019.04-rc1: * support for Chromebook Bob * full pinctrl driver using DTS properties * documentation improvements * I2S support for some Rockchip SoCs
2019-02-02Merge tag 'mips-pull-2019-02-01' of git://git.denx.de/u-boot-mipsTom Rini
- MIPS: mscc: jr2: small fixes - MIPS: mscc: luton: add ethernet and switch driver - MIPS: mt76xx: fix timer frequency
2019-02-01regulator: pbias: Handle extended drain IO when changing omap36 PBIASAdam Ford
The OMAP36 and DM37 TRM state to disable extneded drain IO before changing the PBIAS. This patch does this before pmic writes if the CONFIG_MMC_OMAP36XX_PINS flag is set and the cpu family is omap36xx Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-01pinctrl: Kconfig: fix missing include of rockchip/KconfigPhilipp Tomsich
After the merge of the new, generic pinctrl-code, the include for rockchip/Kconfig was missing. Add it here, so we can select the pinctrl-driver for SPL. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: Kconfig: sort includes alphabeticallyPhilipp Tomsich
To make adding new subdirectories easier, let's enforce alphabetical ordering of the includes of Kconfig files in the respective subdirectories. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Implement spl_gpio in the GPIO driverSimon Glass
Allow rockchip boards to use GPIOs before driver model is ready. This is really only useful for setting GPIOs to enable the early debug console, if needed on some platforms. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: clk: Add mention of four new clocksSimon Glass
These clocks are needed to get MMC running. We don't actually support setting them yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01clk: Improve debug message in clk_set_default_rates()Simon Glass
It is helpful to print the clock number as well as the index, so that this can be looked up in the binding file. Update the debug() statement to do this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: rockchip: Clean the unused rockchip pinctrl driversDavid Wu
If we used the pinctrl-rockchip driver, these code is not needed, so remove them. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01pinctrl: rockchip: Add common rockchip pinctrl driverDavid Wu
Use this driver to fit all Rockchip SOCs and to support the desired pinctrl configuration via DTS. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add a sound driverSimon Glass
Add a sound driver for rk3288 supporting chromebook_jerry. This uses the I2S driver, and existing audio codec and the clock/pinmux support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: Add an I2S driverSimon Glass
Add a driver for I2S which allows audio data to be sent from the SoC to the audio codec. The sample rate and other settings are hard-coded for now as there is no suitable device-tree binding available. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01rockchip: rk3288: Add i2s pinctrl and clock supportSimon Glass
Add support for setting pinctrl and clock for I2S on rk3288. This allows the sound driver to operate. These settings were created by rkmux.py Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01usb: ether: call _usb_eth_halt() if initialization failsJean-Jacques Hiblot
If the host does not respond in time, the initialization fails. However the usb ether driver will still be registered. This will make usb_gadget_probe_driver() fail the next time the initialization is attempted because it cannot find an available UDC. Fixing this by calling _usb_eth_halt() when the init fails. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-02-01net: Add MSCC Luton networkd driver.Horatiu Vultur
Add network driver for Microsemi Ethernet switch, it is present on Luton SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Remove unused variablesHoratiu Vultur
Remove unused variables in the struct ocelot_private and make miim variable static. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move mac_table_add function into different file.Horatiu Vultur
Move the function mac_table_add into a different file, so it can be reused. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move ocelot_send and ocelot_recv in a different file.Horatiu Vultur
This functions can be reused by other MSCC SoCs therefore, make them more generic and move them in separate files. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move miim commands into separate file.Horatiu Vultur
Move miim functions that can be shared in a different file inside mscc_eswitch. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-02-01net: mscc: Move ocelot_switch to mscc_eswitch folderHoratiu Vultur
Move file ocelot_switch to mscc_eswitch to prepare to add new net drivers for other MSCC SoCs. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-01-31Merge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-videoTom Rini
- ihs and imx driver fixes - relax EDID validation checks for 0 hsync/vsync pulse width (support some quirky displays)
2019-01-31video: Add Meson Video Processing Unit DriverNeil Armstrong
This adds video output support for Amlogic GXBB/GXL/GXM chips. The supported ports are CVBS and HDMI (based on DW_HDMI). When using HDMI, only DMT modes are supported. There is support for simple-framebuffer (CONFIG_VIDEO_DT_SIMPLEFB) Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> [narmstrong: fixed defines alignment in meson_canvas.c] Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31video: dw_hdmi: add support for color conversionJorge Ramirez-Ortiz
Some IPs like the meson VPU can only feed a particular pixel format to dw_hdmi. As of now, the driver is hardcoded to use RGB888 as input. This commit enables different pixel format inputs, with the appropriate CSC configuration. Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31video: dw_hdmi: support SoC specific read/write opsJorge Ramirez-Ortiz
Some IPs like the meson VPU have a specific way to write to dw_hdmi registers. Make it configurable. Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> [added commit description] Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-31power: domain: meson-gx-pwrc-vpu: add missing dependsMaxime Jourdan
MESON_GX_VPU_POWER_DOMAIN should depend on POWER_DOMAIN. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-01-30dfu: mmc: call fs functions instead of run_commandSimon Goldschmidt
This unbreaks dfu mmc_file_op which is currently broken since using the load cmd on a buffer from heap is not allowed - added with commit aa3c609e2be5 ("fs: prevent overwriting reserved memory") Fixes: commit aa3c609e2be5 ("fs: prevent overwriting reserved memory") Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-30Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
- Enable DM_MMC support
2019-01-30sunxi: clk: enable clk and reset for CCU devicesAndre Przywara
Some Allwinner clock devices have parent clocks and reset gates itself, which need to be activated for them to work. Add some code to just assert all resets and enable all clocks given. This should enable the A80 MMC config clock, which requires both to be activated. The full CCU devices typically don't require resets, and have just fixed clocks as their parents. Since we treat both as optional and enabling fixed clocks is a NOP, this works for all cases, without the need to differentiate between those clock types. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
2019-01-30Merge tag 'u-boot-imx-20190129' of git://git.denx.de/u-boot-imxTom Rini
For 2019.04
2019-01-29mmc: sunxi: Honour non-removable property in DTAndre Przywara
If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
2019-01-29mmc: sunxi: Add DM clk and reset supportAndre Przywara
Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-01-29mmc: sunxi: Add DM_MMC support for A80Jagan Teki
A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-29mmc: sunxi: Add DM_MMC support for H6Jagan Teki
Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-01-29mmc: sunxi: Add remaining compatible stringsJagan Teki
Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-01-29sunxi: clk: A80: add MMC clock supportAndre Przywara
The A80 handles resets and clock gates for the MMC devices differently, outside of the CCU IP block. Consequently we have a separate clock device with a separate binding for that. Implement that with the respective clock gates and resets to allow the A80 taking part in the DM_MMC game. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [jagan: fix a80 mmc clock config compatible] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-01-29sunxi: clk: add MMC gates/resetsAndre Przywara
Add the MMC clock gates and reset bits for all the Allwinner SoCs. This allows them to be used by the MMC driver. We don't advertise the mod clock yet, as this is still handled by the MMC driver. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [jagan: add V3S, A80 gates/resets] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-01-29pinctrl: meson: add pinconf supportJerome Brunet
Adding pinconf support is necessary to enable boot from SPI without breaking the eMMC. When booting from SPI, the ROM code leave pull downs on the eMMC pad. We need to set pinconf provided in DT to solve this Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: added missing comma in pinctrl-meson-axg-pmx.c]
2019-01-28ihs_video_out: Fix error handlingMario Six
The ihs_video_out driver's error handling is incorrect in two places (one is a missing negation, and in one place a error should be ignored). Fix these two instances. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-01-28videomodes: Relax EDID validation checks for hsync/vsync pulse widthPriit Laes
Current EDID detailed timing parser errors out when either horizontal or vertical pulse sync width is 0, thus not allowing a display with EDID listed below work properly. EDID below works ok within Linux although it warns about these two fields being 0. Therefore relax the checks a bit so we can actually use this the screen out of the box. Of-course, this display itself is somewhat quirky display with following anti-features: - HPD pin is not usable - although resolution is 640x480, only top 240 pixels are visible $ xxd -p display.edid 00ffffffffffff0005a1e00301000000150f0103800f05780a0f6ea05748 9a2610474f200000010101010101010101010101010101012a08804520e0 0b1020004000953600000018000000fd0034441a2403000a202020202020 0000001000310a20202020202020202020200000001000002a4030701300 782d1100001e006b $ edid-decode display.edid EDID version: 1.3 Manufacturer: AMA Model 3e0 Serial Number 1 Digital display Maximum image size: 15 cm x 5 cm Gamma: 2.20 RGB color display First detailed timing is preferred timing Display x,y Chromaticity: Red: 0.6250, 0.3398 Green: 0.2841, 0.6044 Blue: 0.1494, 0.0644 White: 0.2802, 0.3105 Established timings supported: 640x480@60Hz 4:3 HorFreq: 31469 Hz Clock: 25.175 MHz Standard timings supported: Detailed mode: Clock 20.900 MHz, 149 mm x 54 mm 640 672 672 709 hborder 0 480 484 484 491 vborder 0 -hsync -vsync VertFreq: 60 Hz, HorFreq: 29478 Hz Monitor ranges (GTF): 52-68Hz V, 26-36kHz H, max dotclock 30MHz Dummy block Dummy block Checksum: 0x6b (valid) Signed-off-by: Priit Laes <priit.laes@paf.com> Signed-off-by: Priit Laes <plaes@plaes.org>
2019-01-28mmc: fsl_esdhc: add compatible for fsl, imx53-esdhcPatrick Bruenn
Add compatible "fsl,imx53-esdhc" to keep mmc working on i.MX53 platforms with CONFIG_DM_MMC=y Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2019-01-28MTD: nand: mxs_nand_spl: Fix empty function pointer for BBTAdam Ford
The initialization function calls a nand_chip.scan_bbt(mtd) but scan_bbt is never initialized resulting in an undefined function pointer. This will direct the function pointer to nand_default_bbt defined in the same file. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2019-01-28spi: mxc_spi: Fix build warning on ARM64 platformsYe Li
When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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