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2018-08-08usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER commandAlberto Panizzo
Chip Version is a string saved in BOOTROM address space Little Endian. Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030 which brings: 320A20140813V200 Note that memory version do invert MSB/LSB so printing the char buffer would show: A02341023180002V Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08usb: rockchip: fix command failed on host side due to missing dataAlberto Panizzo
Two consecutive rockusb_tx_write without waiting for request complete do results in transfer reset of first request and thus no or incomplete data transfer. This because rockusb_tx_write do use just one USB request to keep serialization. So calls like: rockusb_tx_write_str(emmc_id); rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD); was succeeding only when DEBUG was defined because the time spent printing debug info was enough for transfer to complete. This patch fixes the issue adding a simple request complete handler called rockusb_tx_write_csw to be set as complete handler of in_req when sending back simple payload + CSW replies to commands. This new handler will always send CSW_GOOD replies because in case of error the command callback itself must send back an error CSW as unique reply to command. This patch fixes execution of: $ rkdeveloptool rfi when DEBUG is not defined. Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
2018-08-08gadget: f_thor: fix hang-up with ctrl-cSeung-Woo Kim
After the commit 6aae84769a0b ("gadget: f_thor: Fix memory leaks of usb request and its buffer"), there is hang-up with ctrl-c in some udc. It is because req of out_ep is freed before out_ep is disabled. Fix hang-up with ctrl-c by disabling ep before free req of the ep. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-08-08fsl/mc: Limit the ethernet name to ETH_NAME_LENPankaj Bansal
The ethernet name should be within the ETH_NAME_LEN, as this is the buffer space allocated to ethernet name. Otherwise, this causes buffer overflow. Reported-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-08FSL PCI: Configure PCIe reference ratioJoakim Tjernlund
Most FSL PCIe controllers expects 333 MHz PCI reference clock. This clock is derived from the CCB but in many cases the ref. clock is not 333 MHz and a divisor needs to be configured. This adds PEX_CCB_DIV #define which can be defined for each type of CPU/platform. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-08-08test: dm: pci: Add cases for finding PCI capability APIsBin Meng
Add several PCI capability and extended capability ID registers in the swap_case driver, so that we can add test case for dm_pci_find_capability() and dm_pci_find_ext_capability(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08dm: pci: Add APIs to find capability and extended capabilityBin Meng
This introduces two new APIs dm_pci_find_capability() and dm_pci_find_ext_capability() to get PCI capability address and PCI express extended capability address for a given PCI device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08pci: sandbox: emul: Rename priv structureBin Meng
We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid confusion, rename the emul's priv to "struct sandbox_pci_emul_priv". Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08pci: sandbox: swap_case: Declare dynamic driver matchingBin Meng
This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08pci: sandbox: Support dynamically binding device driverBin Meng
At present all emulated sandbox pci devices must be present in the device tree in order to be used. The real world pci uclass driver supports pci device driver matching, and we should add such support on sandbox too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08dm: pci: Assign correct driver data when binding a driverBin Meng
The correct driver data comes from the matching 'id' instead of 'find_id' in pci_find_and_bind_driver(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08pci: sandbox: emul: Fix the call to pci_bus_find_devfn()Bin Meng
With the newly added test cases for PCI configuration access, we get: => ut dm pci_busdev Test: dm_test_pci_busdev: pci.c test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor: Expected 4660, got 65535 Test: dm_test_pci_busdev: pci.c (flat tree) test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor: Expected 4660, got 65535 Failures: 2 The bug only shows up when bus number is not equal to zero. This is caused by the plain find_devfn parameter is passed to function call pci_bus_find_devfn(), inside which find_devfn is compared to devfn in the device's pplat structure. However pplat->devfn does not carry the bus number. Fix this by passing find_devfn with bus number masked. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08pci: sandbox: swap_case: Preserve space indicator bit in BAR registersBin Meng
With the newly added testing of more than one device, we get: => ut dm pci_swapcase Test: dm_test_pci_swapcase: pci.c test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Test: dm_test_pci_swapcase: pci.c (flat tree) test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Failures: 2 The failure only happens on the 2nd swap_case device on the PCI bus. The case passes on the 1st device. It turns out the swap_case driver does not emulate bit#0 in BAR registers as a read-only bit. This corrects the implementation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08dm: pci: Fix scanning multi-function deviceBin Meng
The flag to control whether to scan multi-function device during enumeration should be cleared at the beginning of each iteration if the device's function number equals to zero. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08dm: pci: Extract vendor/device id in child_post_bind()Bin Meng
Currently only devfn is extracted in child_post_bind(). Now that we have the live-tree version API to look up PCI vendor and device id from the compatible string, let's extract and save them too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08dm: core: Add ofnode function to read PCI vendor and device idBin Meng
We don't have the live-tree version of fdtdec_get_pci_vendev(). This adds the API. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-08bcm6838: add initial supportPhilippe Reynes
This adds the initial support of the Broadcom BCM6838 SoC familly, only cpu, dram, uart and leds are supported. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08bmips: ram: add an option to force the size of the ramPhilippe Reynes
This adds an option to force the size of the ram, and avoid the detection of ram size. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-08mips: au1x00: Remove support for these SoCsTom Rini
The only platform left for the AU1x00 SoCs was the pb1x00 platform, an apparent clone of the dbau1x00 platform. As pb1x00 had no listed maintainer I am assuming that it is also orphaned. Remove this platform and then remove the unused SoC support. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-08-07Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2018-08-07Merge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx fixes for v2018.09-rc2 xilinx: - Add support for zybo z7 and ultra96 - Tune zynq and zynqmp mini configurations - Move SYS_MALLOC_LEN to Kconfig fdt - make static funcs gpio: - Fix soft gpio driver - Fix Zynq gpio driver by using platdata microblaze: - Fix Kconfig entry spi - Move ISSI to Kconfig
2018-08-07Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2018-08-07gpio: xilinx: Add support for using label propertyMichal Simek
Add support for reading label property from DT and set up bank name based on that. If label property is not present full device node name is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Return 0 from xilinx_gpio_set_valueMichal Simek
.set_value functions have no specified return value and gpio_uclass is not working with it too. But this patch is returning 0 to be in sync with others DM gpio drivers. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Not read output values via regsMichal Simek
Reading registers for finding out output value is not working because input value is read instead in case of tristate. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Simplify logic in xilinx_gpio_set_valueMichal Simek
There is no reason to do read/write for if/else separately. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Set value before changing directionMichal Simek
Set a value before changing gpio direction. This will ensure that the old value is not propagated when direction has changed but new value is not written yet. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-07gpio: xilinx: Remove !DM driverMichal Simek
There is no user for !DM driver that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-07gpio: xilinx: Find out bank before use in xilinx_gpio_get_function()Michal Simek
Call xilinx_gpio_get_bank_pin() before use. Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
2018-08-06i2c: imx_lpi2c: add uclass api supportPeng Fan
Use uclass clk api to get per clk when CONFIG_CLK enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-08-06i2c-mux: pca954x: support pca9646 i2c switchPeng Fan
Add the PCA9646 support, which is 2-wire bus switch and buffered 4-channel. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-08-06dm: core: device: enable power domain in probePeng Fan
Enable power domain associated with the device when probe. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06power: Add CONFIG_SPL_POWER_DOMAIN configPeng Fan
Add CONFIG_SPL_POWER_DOMAIN config entry. Build drivers/power/domain if this config is selected. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06gpio: zynq: Used platdata structure for storing static data instead of privVipul Kumar
This patch used platdata structure instead of priv for storing static information read from DT. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06spi: Kconfig: Create ISSI Kconfig entryMichal Simek
Add ISSI to Kconfig to make it selectable via menuconfig. Also convert all current platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06ARM: Odroid XU3: Modify exynos dw_mmc driver to support Odroid XU3 in DM MMCLukasz Majewski
This commit enables support for Exynos Designware MMC driver based on DM. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06ARM: Odroid XU3: Fix the dwmci_exynos *priv data assignment for DM_MMC ↵Lukasz Majewski
(sdr_timing) By convention for DM_MMC the host->priv is used to store struct udevice *dev pointer. Unfortunately, the legacy Exynos DW MMC code uses this field to store pointer to dwmci_exynos_priv_data struct Hence, we do need to get data in other way - namely by using container_of when host pointer is present. In this way the sdr_timing data is properly accessed. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-06ARM: dw_mmc: Exclude dwmci Exynos priv_data allocation from ↵Lukasz Majewski
exynos_dwmci_get_config() This commit prevents memory leak when this function is used with DM_MMC as the struct dwmci_exynos_priv_data is already allocated by DM. It is necessary for NON DM aware devices to allocate this struct first. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-08-04Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
2018-08-04Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-08-04clk: clk_set_default: accept no-op skip fieldsNeil Armstrong
The Assigned Clock parents and rates misses the fact that a "0" entry can be passed to skip setting a parent or rate of an assigned clock as described in the Linux clock bindings at [1]. This patch simply skips the clock reparenting if the DT parsing returns -ENOENT and the clock rate setting if "0" is passed as clock rate. [1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/clock-bindings.txt#L135 Fixes: f4fcba5c5baa "clk: implement clk_set_defaults()" Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03mmc: arm_pl180_mmci: Remove cd_inverted host's struct fieldPatrice Chotard
As platform uses GPIOs for card detection, it's simpler and more readable to use GPIO_ACTIVE_(LOW|HIGH) in the gpio flags instead of using the cd-inverted property. Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03mmc: arm_pl180_mmci: Add missing clk_freePatrice Chotard
Add missing clk_free() call in case of failure when enabling the clock. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03mmc: arm_pl180_mmci: Update to support CONFIG_BLKPatrice Chotard
Config flag CONFIG_BLK becomes mandatory, update arm_pl180_mmci to support this config. This driver is used by STM32Fx and by Vexpress platforms. Only STM32Fx are DM ready. No DM code is isolated and will be removed easily when wexpress will be converted to DM. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-03bootcount: Fix misaligned cache operationAlex Kiernan
1947c2d2a0 introduces cache line flushes for the bootcounter, but if the start address is not aligned then the flush causes warnings of the form: CACHE: Misaligned operation at range [4030b7fc, 4030b83c] Align both the start and end of the buffer (possibly crossing multiple lines). Fixes: 1947c2d2a0 ("bootcount: flush after storing the bootcounter") Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
2018-08-03adc: Add driver for STM32 ADCFabrice Gasnier
This patch adds support for STMicroelectronics STM32 ADC (analog to digital converter). It's originally based on Linux kernel v4.18-rcs drivers/iio/adc/stm32-adc*. It's composed of: - core driver (UCLASS_SIMPLE_BUS) manages common resources (clk, regu). - child drivers (UCLASS_ADC) declare each ADC, channels and handle conversions. This driver currently supports STM32H7 and STM32MP1 ADC. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03dm: adc: uclass: get reference regulator onceFabrice Gasnier
device_get_supply_regulator() only needs to be called once. But each time there's call to adc_vxx_value() for instance, it calls adc_vxx_platdata_update() -> device_get_supply_regulator(). So, move device_get_supply_regulator() to pre_probe() routine. This also allows vdd_supply/vss_supply to be provided directly from uc_pdata, e.g dt-binding variant like stm32-adc provide its own 'vref-supply'. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03clk: add clk_valid()Fabrice Gasnier
Add clk_valid() to check for optional clocks are valid. Call clk_valid() in test/dm/clk.c and add relevant test routine to sandbox clk tests. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-03arm: sunxi: Allwinner A10 SPI driverStefan Mavrodiev
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-08-03spi: kirkwood: add orion-spi compatible stringChris Packham
This matches the compatible string used by the Linux kernel. This will allow u-boot to use the same device tree files. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: use armada instead of orion on .data] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>