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2017-09-22mmc: uniphier-sd: Add support for R8A7795 and R7A7796Marek Vasut
Add OF match entries and quirks for Renesas RCar Gen3 controllers into the driver. The IP this driver handles is in fact Matsushita one and in used both in Socionext and Renesas chips. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22mmc: uniphier-sd: Add support for quirksMarek Vasut
Check if the OF match has any associated data and if so, use those data as the controller quirks, otherwise fallback to the old method of reading the controller version register to figure out the quirks. This allows us to supply controller quirks on controllers which ie. do not have version register. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22mmc: uniphier-sd: Add support for 64bit FIFOMarek Vasut
The Renesas RCar Gen3 contains the same controller, originally Matsushita. This patch adds support for handling of the 64bit FIFO on this controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22mmc: uniphier-sd: Add support for 64bit controllerMarek Vasut
The Renesas RCar Gen3 contains the same controller, originally Matsushita, yet the register addresses are shifted by 1 to the left. The whole controller is also 64bit, including the data FIFOs and RSP registers. This patch adds support for handling the register IO by shifting the register offset by 1 in the IO accessor functions. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-22mmc: uniphier-sd: Factor out register IOMarek Vasut
This patch prepares the driver to support controller(s) with registers at locations shifted by constant. Pull out the readl()/writel() from the driver into separate functions, where the adjustment of the register offset can be easily contained. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2017-09-18Merge git://git.denx.de/u-boot-rockchipTom Rini
2017-09-18rockchip: sdhci: update reg map for of-platdataKever Yang
After Simon's patch, the dtoc can work with 64bit address, so we need to fix reg number for it. Depend on Simon's patch set: https://patchwork.ozlabs.org/cover/807266/ Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATAPhilipp Tomsich
With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the OF_PLATDATA structure layout changes. This adjusts the DMC driver for the RK3368 to track these changes. For the time being (i.e. until regmap_init_mem_platdata works for the 64bit case), we won't use regmap_init_mem_platdata here and simply access of_plat.reg[] directly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18rockchip: timer: update for 32/64bit-aware OF_PLATDATAPhilipp Tomsich
With dtoc emitting fdt64_t for addresses (and region sizes), the array indices for accessing the reg[] array needs to be adjusted. This adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA given this new structure layout. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18rockchip: efuse: change to use dev_read_addr_ptrPhilipp Tomsich
With the dev_read_addr_ptr function available, we can change the efuse driver to use it (and eliminate the explicit type-cast). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18rockchip: clk: rk3399: Convert to livetreePhilipp Tomsich
Update the clock driver for the RK3399 to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1Philipp Tomsich
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message. This implements a minimal clk_enable for the RK3399 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18rockchip: gpio: remove outdated/misleading commentPhilipp Tomsich
Remove a comment claiming that this driver only supports the RK3288, as we also use it on the RK3368, RK3399 and (most likely) on other variants. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rk_gpio.c
2017-09-18rockchip: gpio: convert to livetreePhilipp Tomsich
Update the Rockchip GPIO-bank driver to support a live tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rk_gpio.c
2017-09-18rockchip: i2c: Convert to livetreePhilipp Tomsich
Update the Rockchip I2C driver to support livetree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Heiko Schocher <hs@denx.de>
2017-09-18rockchip: rk8xx: remove unused header includesPhilipp Tomsich
Remove header file includes that have been left over after the conversion to livetree-support. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: sdhci: Convert to livetreePhilipp Tomsich
Update the Rockchip SDHCI wrapper to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rockchip_sdhci.c
2017-09-18rockchip: spi: Convert to livetreePhilipp Tomsich
Update the Rockchip SPI driver to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: pinctrl: rk3368: Convert to livetreePhilipp Tomsich
Update the pinctrl driver for the RK3368 to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: clk: rk3368: Convert to livetreePhilipp Tomsich
Update the clock driver for the RK3368 to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in clk_rk3368.c
2017-09-18rockchip: timer: Convert to livetreePhilipp Tomsich
Update the Rockchip timer driver to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: timer: implement timer_get_boot_usPhilipp Tomsich
To make the Rockchip DM timer driver useful for the timing of bootstages, we need a few enhancements: - This implements timer_get_boot_us. - This avoids reinitialising the timer, if it has already been set up (e.g. by our TPL and SPL stages). Now, we have a single timebase ticking from TPL through the full U-Boot. - This adds support for reading the timer even before the device-model is ready: we find the timer via /chosen/tick-timer, then read its address and clock-frequency, and finally read the timeval directly). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: mmc: convert to livetreePhilipp Tomsich
Update the Rockchip-specific wrapper for the Designware driver to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Version-changes: 2 - use the dev_read_addr_ptr function in rockchip_dw_mmc.c
2017-09-18net: phy: micrel: Convert to livetreePhilipp Tomsich
Update the Micrel KSZ90x1 driver for a live tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18net: designware: Convert to livetreePhilipp Tomsich
Update the Designware Ethernet MAC driver to support a live device tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18dm: core: add dev_read_addr_ptr()Philipp Tomsich
The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(), retrieving the first address of the node's reg-property and returning it as a pointer (or NULL on failure). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-18dm: timer: handle being called before dm_root is readyPhilipp Tomsich
When used with bootstage recording, dm_timer_init may be called surprisingly early: i.e. before dm_root is ready. To deal with this case, we explicitly check for this condition and return -EAGAIN to the caller (refer to drivers/timer/rockchip_timer.c for a case where this is needed/used). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18dm: timer: Convert to livetreePhilipp Tomsich
This updates dm_timer_init to support a live tree and deals with some fallout (i.e. the need to restructure the code such, that we don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18rockchip: enable rk322x sysreset driverKever Yang
The sysreset driver for rk322x is ready but not enabled, add it to Makefile to make sure it's enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-18Merge git://git.denx.de/u-boot-uniphierTom Rini
2017-09-18mtd: nand: denali: allow to override corrupted revision registerMasahiro Yamada
The Denali IP does not update the revision register properly. Allow to override it with SoC data associated with compatible. Linux had already finished big surgery of this driver, but I need to prepare the NAND core before the full sync of the driver. For now, I am fixing the most fatal problem on UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-17Merge git://git.denx.de/u-boot-x86Tom Rini
2017-09-16dm: x86: Allow TSC timer to be used before DM is readySimon Glass
With bootstage we need access to the timer before driver model is set up. To handle this, put the required state in global_data and provide a new function to set up the device, separate from the driver's probe() method. This will be used by the 'early' timer also. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-16x86: tsc: Add Airmont reference clock valuesBin Meng
Per the Intel 64 and IA-32 Architecture Software Developer's Manual, add the reference clock for Intel Atom Processors based on the Airmont Microarchitecture (Braswell). This keeps in sync with Linux kernel commit: 6fcb41c: x86/tsc_msr: Add Airmont reference clock values Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-15Merge git://git.denx.de/u-boot-fdtTom Rini
2017-09-15Merge git://git.denx.de/u-boot-i2cTom Rini
2017-09-15blk: Remove various places that do flush cache after readBin Meng
All these places seem to inherit the codes from the MMC driver where a FIXME was put in the comment. However the correct operation after read should be cache invalidate, not flush. The underlying drivers should be responsible for the cache operation. Remove these codes completely. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: York Sun <york.sun@nxp.com>
2017-09-15dtoc: Put phandle args in an arraySimon Glass
We want to support more than one phandle argument. It makes sense to use an array for this rather than discrete struct members. Adjust the code to support this. Rename the member to 'arg' instead of 'id'. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-09-15dtoc: Rename the phandle structSimon Glass
Rather than naming the phandle struct according to the number of cells it uses (e.g. struct phandle_2_cell) name it according to the number of arguments it has (e.g. struct phandle_1_arg). This is a more intuitive naming. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-09-15dtoc: Add support for 32 or 64-bit addressesSimon Glass
When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2017-09-14ARM: at91: Remove hardware.h included in configsWenyou Yang
As said in READRE.kconfig, include/configs/*.h will be removed after all options are switched to Kconfig. As the first step, remove the follow line from include/configs/*.h. #include <asm/hardware.h> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-09-14clk: at91: utmi: Set the reference clock frequencyWenyou Yang
By default, it is assumed that the UTMI clock is generated from a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ field of the SFR_UTMICKTRIM has to be updated to generate the UTMI clock in the proper way. The UTMI clock has a fixed rate of 480 MHz. In fact, there is no multiplier we can configure. The multiplier is managed internally, depending on the reference clock frequency, to achieve the target of 480 MHz. The patch is cloned from the patch of mailing-list: [PATCH v2] clk: at91: utmi: set the mainck rate Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> [trini: Depend on SPL_DM] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-14clk: Kconfig: Add dependences of SPL_CLKWenyou Yang
The SPL_CLK config should depend on SPL && SPL_DM. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-13serial: nulldev: Add nulldev serial driverKeng Soon Cheah
Some device the serial console's initialization cannot run early during the boot process. Hence, nulldev serial device is helpful on that situation. For example, if the serial module was implemented in FPGA. Serial initialization is prohibited to run until the FPGA was programmed. This commit is to adding nulldev serial driver. This will allows the default console to be specified as a nulldev. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com>
2017-09-13i2c: muxes: pca954x: Add support for GPIO reset lineMoritz Fischer
This commit adds support for GPIO reset lines matching the common linux "reset-gpios" devicetree binding. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-12dma: import linux/dma-direction.h to consolidate enum dma_data_directionMasahiro Yamada
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete duplicated definitions of enum dma_data_direction. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-09-12cosmetic: bootcount: correct comment for used scratch registerTomas Melin
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2017-09-12misc: i2c_eeprom: Add compatible for AT24MAC402Wenyou Yang
Add the new compatible "atmel,24mac402" to accommodate AT24MAC402. The AT24MAC402 is a 2K Serial EEPROM and the 2-Kbit memory array is internally organized as 16 pages of 16 bytes of EEPROM each. The 48-bit EUI address in the AT24MAC402 are located in the extended memory block. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-09-12misc: i2c_eeprom: Add compatible for 24AA02E48Wenyou Yang
Add the new compatible "microchip,24aa02e48" to accommodate 24AA02E48, the 24AA02E48 is a 2K I2C Serial EEPROM with pre-programmed globally unique, 48-bit node address, and 8-byte page size. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-09-12Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
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