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When this feature is enabled, we cannot access the device tree to find out
which serial device to use. Just use the first serial driver we find.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add support for this feature in the core clock code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a driver which uses of-platdata to obtain its platform data. This can
be used to test the feature in sandbox. It displays the contents of its
platform data.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Provide a new function which can cope with obtaining information from
of-platdata instead of the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a placeholder for now so that this code will compile. It currently does
nothing.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When CONFIG_SPL_OF_PLATDATA is enabled we should not access the device
tree. Remove all references to this in the core driver-model code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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SPL does not support an LCD display so there is no need to sync the video
when there is serial output.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This code generates lots of checkpatch errors. Fix them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This patch adds 200MHz clock configuration for stm32f746 discovery board.
This patch is based on STM32F4 and emcraft's[1].
[1]: https://github.com/EmcraftSystems/u-boot
Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
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For consistency with board_should_run_oprom(), do the same to
should_load_oprom(). Board support codes can provide this one
to override the default weak one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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At present should_load_oprom() calls board_should_run_oprom() to
determine whether oprom should be loaded. But sometimes we just
want to load oprom without running. Make them independent.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This option is defined at nowhere. Remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch support the driver mode for exynos dwmmc controller.
To support the legacy model, maintained the existing code.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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If there is not "samsung,bus-width" property, use the 4bit buswidth by
default.
Almost all Exnyos SoCs support at least 4bit buswidth.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Clean the unused and unnecessary codse.
This patch is one of them for preparing to use DM.
Because it's easy to maintain and combine DM after cleaning codes.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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PERIPH_ID_SDMMC4(131) is not continous value with PERIPH_ID_SDMMC0(75).
If there is no 'index' property in fdt, then dev_index should be
assigned to dev_id(Peripheral ID).
At this time, dev_index should be "56". It means Exynos SoC has "56"
numbers of DWMMC IP. To prevent this behavior, it needs to check the
maximum device index.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Removed #ifdef for OF_CONTROL.
It might use 'OF_CONTROL' by default.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This function have maintained for supporting Non-FDT.
Now, Almost all SoC are changed to fdt style.
So there are no that this function is called anywhere.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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The cros-ec keyboard is always a child of the cros-ec node. Rather than
searching the device tree, looking at the children. Remove the compat string
which is now unused.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Define a platform data structure for the MPC85XX GPIO driver to allow
use of the driver without device tree. Users should define the GPIO
blocks for their platform like this:
struct mpc85xx_gpio_plat gpio_blocks[] = {
{
.addr = 0x130000,
.ngpios = 32,
},
{
.addr = 0x131000,
.ngpios = 32,
},
};
U_BOOT_DEVICES(my_platform_gpios) = {
{ "gpio_mpc85xx", &gpio_blocks[0] },
{ "gpio_mpc85xx", &gpio_blocks[1] },
};
This is intended to build upon the recent submission of the base
MPC85XX driver from Mario Six. We need to use that new driver
without dts support and this patch gives us that flexibility.
This has been tested on a Freescale T2080 CPU, although only the first
GPIO block.
Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Simon Glass <sjg@chromium.org>
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Update the method of accessing the block device so that it works with
CONFIG_BLK enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Now that we have fully moved to driver model, drop the old code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add support for using driver model for block devices and MMC operations in
this driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add support for using driver model for block devices and MMC operations in
this driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move the configuration setting into a separate function which can be used by
the driver-model code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Update the sandbox MMC emulation to use driver model for MMC operations.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable this option to move rockchip over to use driver model for MMC
operations.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add support to dwmmc for using driver model for MMC operations.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The driver model conversion for MMC has moved in small steps. The first step
was to have an MMC device (CONFIG_DM_MMC). The second was to use a child
block device (CONFIG_BLK). The final one is to use driver model for MMC
operations (CONFIG_DM_MMC_OP). Add support for this.
The immediate priority is to make all boards that use DM_MMC also use those
other two options. This will allow them to be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move this code into separate functions so that it can be used from the uclass
also. Add static inline versions for when the option is disabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Since all Rockchip boards use CONFIG_BLK, we can remove this old code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rather than having an #ifdef in the main mmc.c file, control this feature
from the Makefile by moving the code into its own file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rather than having #ifdef in mmc.c, move this code into the legacy file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rather than having #ifdef in mmc.c, move this code into the uclass file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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These private functions are used both in the driver-model implementation and
in the legacy code. Add them to the header.
Signed-off-by: Simon Glass <sjg@chromium.org>
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In case of DT boot, don't read default speed and mode for SPI from
CONFIG_*, instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies and SPI modes.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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Instead of relying on CONFIG_SPI_FLASH_QUAD to be defined to enable QUAD
mode, make use of mode_rx field of dm_spi_slave_platdata to determine
whether to enable or disable QUAD mode. This is necessary to support
muliple SPI controllers where one of them may not support QUAD mode.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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AHB address can be as long as 32 bit, hence remove the
CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT
and read as u32 value, it anyway does not make sense to mask upper bits.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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Convert davinci_spi driver so that it complies with SPI DM framework.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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This API helps to map physical register addresss pace of device to
virtual address space easily. Its just a wrapper around map_physmem()
with MAP_NOCACHE flag.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
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Add support for standard type SCI (without FIFO) port.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add Device Tree bindings.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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MMC core expects (now) valid mmc->dev pointer.
During conversion in commit cffe5d86 not every driver was updated.
This patch fixes crash while accessing MMC on
boards using Qualcomm SDHCI controller.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Return value of rtl_send_common propogates unmodified all the way
up to eth_send and further to API consumer if CONFIG_API is enabled.
Previously rtl_send_common returned number of bytes sent on success
which was erroneouly detected as error condition by API consumers
that checked for operation success by comparing return value with 0.
Switch rtl_send_common to use common convention: return 0 on success
and negative value for failure.
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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This patch adds support for aquantia AQR106/107 PHY.
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Commit 90b7fc924adf "net: designware: support phy reset device-tree
bindings" made DW GMAC driver dependent on DM_GPIO by unconditional
usage of purely DM_GPIO stuff like:
* dm_gpio_XXX()
* gpio_request_by_name()
But since that driver as of today might be easily used without
DM_GPIO (that's the case for Synopsys AXS10x boards) we're
shielding all DM_GPIO things by ifdefs.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Beniamino Galvani <b.galvani@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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