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Signed-off-by: Wolfgang Denk <wd@denx.de>
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ATI video card BIOS. and can be used for x86 code emulation by some
modifications.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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X300, X700, X800 ATI video cards.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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All of the PCI/PCI-Express driver and initialization code that
was in the MPC8641HPCN port has now been moved into the common
drivers/fsl_pci_init.c. In a subsequent patch, this will be
utilized by the 85xx ports as well.
Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added.
Also enable the second PCI-Express controller on 8641
by getting its BATS and CFG_ setup right.
Fixed a u16 vendor compiler warning in AHCI driver too.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Conflicts:
CHANGELOG
fs/fat/fat.c
include/configs/MPC8560ADS.h
include/configs/pcs440ep.h
net/eth.c
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Signed-off-by: Heiko Schocher <hs@denx.de>
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The Marvel 88E1111S driver for the TSEC was copied from the
88E1101 driver, and included a fix for an erratum which does not
exist on that part. Now it is removed
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Jarrold Wen noticed that the generic PHY code always matches
under the current implementation. Change it so the first match
wins, and *only* unknown PHYs trigger the generic driver
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver
where the reset was being done after the errata code instead of
before.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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PCI_CLASS_PROCESSOR_POWERPC.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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The P2P bridge bus numbers programmed into the device are relative to
hose->first_busno.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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FSL PCIe block has extended cfg registers in the 100 and 400 range.
For example, to read the LTSSM register: pci display <busn>.0 404 1
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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- Make pciauto_{pre,post}scan_setup_bridge non-static
- Added physical address display in debug messages.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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Ensure hose->current_busno is not less than first_busno. This fixes
broken board code which leaves current_busno=0 when first_busno is
greater than 0 for the cases with multiple controllers.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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This patch updates the nand_ecc code to the latest Linux version.
The main reason for this is the more compact code. This makes
it possible to include the ECC code into the NAND bootloader
image (NAND_SPL) for PPC4xx.
Signed-off-by: Stefan Roese <sr@denx.de>
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For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Bridge, ICH-5, ICH-6 and ICH-7.
Implementation:
1. Code is divided in to two files. All functions, which are
controller specific are kept in "drivers/ata_piix.c" file and
functions, which are not controller specific, are kept in
"common/cmd_sata.c" file.
2. Reading and Writing from the S-ATA drive is done using PIO method.
3. Driver can be configured for 48-bit addressing by defining macro
CONFIG_LBA48, if this macro is not defined driver uses the 28-bit
addressing.
4. S-ATA read function is hooked to the File system, commands like
ext2ls and ext2load file can be used. This has been tested.
5. U-Boot command "SATA_init" is added, which initializes the S-ATA
controller and identifies the S-ATA drives connected to it.
6. U-Boot command "sata" is added, which is used to read/write, print
partition table and get info about the drives present. This I have
implemented in same way as "ide" command is implemented in U-Boot.
7. This driver is for S-ATA in native mode.
8. This driver does not support the Native command queuing and
Hot-plugging.
Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
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Added support for Broadcom's BCM5464 Quad Phy
Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
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Conflicts:
include/asm-microblaze/microblaze_intc.h
include/linux/stat.h
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If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Stefan Roese <sr@denx.de>
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the v_mac variable in the smc91111 driver is declared as a signed char ...
this causes problems when one of the bytes in the MAC is "signed" like 0xE0
because when it gets printed out, you get a display like:
0xFFFFFFE0 and that's no good
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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In case that there is no memory based bad block table available the
function nand_block_checkbad() in drivers/mtd/nand/nand_base.c will call
nand_block_bad() directly. When parameter 'getchip' is set to zero,
nand_block_bad() will not right shift the offset to calculate the
correct page number.
Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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When bringing up u-boot on new boards, PHY support sometimes gets
neglected. Most PHYs don't really need any special support,
though. By adding a generic entry that always matches if nothing
else does, we can provide support for "unsupported" PHYs for the
tsec.
The generic PHY driver supports most PHYs, including gigabit.
Signed-off-by: David Updegraff <dave@cray.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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* Add support to the Makefile
* Add 8544 configuration support to the tsec driver
* Add 8544 SVR numbers to processor.h
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Sigend-off-by: Wolfgang Denk <wd@denx.de>
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