summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2016-02-12zynqmp: nand: Add Nand driver support for zynqmpSiva Durga Prasad Paladugu
Add nand driver support for zynqmp. The Nand controller used in ZynqMP is Arasan Nand Flash controller. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [scottwood: Fix checkpatch warning] Signed-off-by: Scott Wood <oss@buserror.net>
2016-02-12mtd: pxa3xx_nand: Don't alloc unneeded memoryKevin Smith
The allocation size is reduced from what was introduced from the Linux kernel, as U-boot uses the statically allocated nand_info instead of needing to dynamically allocate an mtd_info instance. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
2016-02-12mtd: pxa3xx_nand: Correct offset calculationKevin Smith
Correct some pointer math in initialization. An offset was added to a struct-typed pointer instead of one casted to a byte-size, resulting in a much larger offset than intended. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
2016-02-12mtd: pxa3xx_nand: Correct null dereferenceKevin Smith
Correct a null pointer dereference in board_nand_init(). Zeroed memory was allocated, then immediately dereferenced. The dereference is completely removed, since this pointer is later initialized in alloc_nand_resources. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
2016-02-12nand: mxs: fix error handling for mxs_nand_initPeng Fan
Fix error handling for mxs_nand_init. The original error handling is wrong for err2 and err1. Should first free desc[x], then free desc. This patch also correctly handle err3, should use MXS_DMA_CHANNEL_AHB_APBH_GPMI0 as the check point. Cc: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <Fabio.Estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2016-02-11Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2016-02-11dm: video: Add a temporary work-around for old stdout varSimon Glass
Boards with a saved environment may use 'lcd' in their stdout environment variable, expecting that this will enable output to the LCD. When the board moves to use driver model for video, this will no-longer work. Add a work-around to fix this. A warning messages is printed, and we will remove the work-around at the end of 2016. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com>
2016-02-08s3c24xx: serial: Remove dead codeDavid Müller (ELSOFT AG)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2016-02-08Remove unused CONFIG_HWFLOW option and associated dead code.David Müller (ELSOFT AG)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2016-02-08Remove unused CONFIG_MODEM_SUPPORT option and associated dead code.David Müller (ELSOFT AG)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2016-02-08drivers: net: keystone_net: convert driver to adopt device driver modelMugunthan V N
Adopt keystone_net driver to adopt device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-08drivers: net: phy: micrel: fix build errors with CONFIG_DM_ETHMugunthan V N
When Micrel phy is selected without CONFIG_PHY_MICREL_KSZ9031 or CONFIG_PHY_MICREL_KSZ9021 there is a build error. Fixing this by adding proper ifdefs drivers/net/phy/micrel.c:370:39: error: array type has incomplete element type static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = ^ drivers/net/phy/micrel.c:372:39: error: array type has incomplete element type static const struct ksz90x1_reg_field ksz9031_clk_grp[] = ^ drivers/net/phy/micrel.c: In function ‘ksz9031_of_config’: drivers/net/phy/micrel.c:377:23: error: array type has incomplete element type struct ksz90x1_ofcfg ofcfg[] = { ^ drivers/net/phy/micrel.c:379:13: error: ‘ksz90x1_rxd_grp’ undeclared (first use in this function) { MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, 2, ksz90x1_rxd_grp, 4 }, ^ drivers/net/phy/micrel.c:379:13: note: each undeclared identifier is reported only once for each function it appears in drivers/net/phy/micrel.c:380:13: error: ‘ksz90x1_txd_grp’ undeclared (first use in this function) { MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, 2, ksz90x1_txd_grp, 4 }, ^ drivers/net/phy/micrel.c:386:3: warning: implicit declaration of function ‘ksz90x1_of_config_group’ [-Wimplicit-function-declaration] ret = ksz90x1_of_config_group(phydev, &(ofcfg[i])); ^ drivers/net/phy/micrel.c:377:23: warning: unused variable ‘ofcfg’ [-Wunused-variable] struct ksz90x1_ofcfg ofcfg[] = { ^ drivers/net/phy/micrel.c: At top level: drivers/net/phy/micrel.c:370:39: warning: ‘ksz9031_ctl_grp’ defined but not used [-Wunused-variable] static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = ^ drivers/net/phy/micrel.c:372:39: warning: ‘ksz9031_clk_grp’ defined but not used [-Wunused-variable] static const struct ksz90x1_reg_field ksz9031_clk_grp[] = ^ scripts/Makefile.build:277: recipe for target 'drivers/net/phy/micrel.o' failed make[1]: *** [drivers/net/phy/micrel.o] Error 1 Makefile:1201: recipe for target 'drivers/net/phy' failed make: *** [drivers/net/phy] Error 2 make: *** Waiting for unfinished jobs.... Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-02-08dm: pxa: serial: Drop serial_sa1100 serial driverSimon Glass
This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-08dm: serial: Drop serial_max3100 serial driverSimon Glass
This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-08dm: freescale: serial: Drop serial_imx serial driverSimon Glass
This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-08dm: opencores: Drop opencores_yanu serial driverSimon Glass
This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-08dm: freescale: Drop mxs_auart serial driverSimon Glass
This does not appear to be used, and has not been converted to driver model by the deadline (doc/driver-model/serial-howto.txt). Signed-off-by: Simon Glass <sjg@chromium.org>
2016-02-08serial: serial_stm32: move clock config from driver to boardVikas Manocha
This patch removes the uart clock enable from serial driver & move it in the board code. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-08Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini
2016-02-06video: bcm2835: use bus_to_phys() on FB addressStephen Warren
The FB address is generated by the firmware running on the GPU/VideoCore and is a "bus" address. This address is the other side of an IOMMU from the ARM upon which U-Boot is running. Use bus_to_phys() to convert this to an ARM physical address. Without this, U-Boot seems to work just fine, but once the Linux kernel boots on an RPi2, accessing the FB memory often causes a hard system hang. This is related to: 122426d46e31 ARM: bcm2835: use phys_to_bus() for mbox 5c0beb5c58c8 usb: dwc2: use phys_to_bus/bus_to_phys 79340db7f1f6 ARM: bcm2835: implement phys_to_bus/bus_to_phys Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2016-02-06net: davinci_emac: fix NULL check after pointer dereferenceVishwas Srivastava
NULL check is made after the pointer dereference. This patch fixes this issue. Signed-off-by: Vishwas Srivastava <vishu.kernel@gmail.com> CC: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-02-06net: fix wrong initialization in davinci-emac driverVishwas Srivastava
emac module of the davinci platform supports only 8 tx and 8 rx channels (total 16). emac driver for davinci platform, however, while doing initialization of the dma descriptor head pointers, wrongly initializes the 16 head pointers (instead of 8) for tx dma and 16 head pointers (insted of 8) for rx dma, which is wrong. The result is, that this register initilization spills over the other registers which was not intended and is undesirable. This patch fixes this problem. Signed-off-by: Vishwas Srivastava <vishu.kernel@gmail.com> CC: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2016-02-06video: Use 'int' for loop variables instead of shortSimon Glass
Using short doesn't save anything and is confusing when the width and height variables are ulong. This may fix Coverity CID134902 but I doubt it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-06Use correct spelling of "U-Boot"Bin Meng
Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-02-05net: e1000: Convert to use DM PCI APIBin Meng
Update this driver to use proper DM PCI APIs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-05net: designware: Use dm_pci_mem_to_phys() in the probe routineBin Meng
Convert to use native DM PCI API dm_pci_mem_to_phys(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-05net: pch_gbe: Convert to use DM PCI APIBin Meng
Use native DM PCI APIs instead of legacy compatible ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-05x86: ich6_gpio: Convert to use proper DM APIBin Meng
At present this GPIO driver still uses the legacy PCI API. Now that we have proper PCH drivers we can use those to obtain the information we need. While the device tree has nodes for the GPIO peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the PCH device. Update the device tree files to show the GPIO controller within the PCH, so that PCI access works as expected. This also adds '#address-cells' and '#size-cells' to the PCH node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05x86: pch9: Implement get_io_base opBin Meng
IO_BASE is only seen on PCH9 device, implement the get_io_base op. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05dm: pch: Add get_io_base opBin Meng
On some newer chipset (eg: BayTrail), there is an IO base address register on the PCH device which configures the base address of a memory-mapped I/O controller. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05x86: pch: Implement get_gpio_base opBin Meng
Implement get_gpio_base op for bd82x6x, pch7 and pch9 drivers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05dm: pch: Add get_gpio_base opBin Meng
x86 GPIO registers are accessed via I/O port whose base address is configured in a PCI configuration register on the PCH device. Add an op get_gpio_base to get the GPIO base address from PCH. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05dm: pch: Rename get_sbase op to get_spi_baseBin Meng
Spell out 'sbase' to 'spi_base' so that it looks clearer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05dm: pch: Remove pch_get_version opBin Meng
pch_get_version op was only used by the ich spi controller driver, and does not really provide a good identification of pch controller so far, since we see plenty of Intel PCH chipsets and one differs from another a lot, which is not simply either a PCHV_7 or PCHV_9. Now that ich spi controller driver was updated to not get such info from pch, the pch_get_version op is useless now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05spi: ich: Change PCHV_ to ICHV_Bin Meng
The ICH SPI controller supports two variants, one of which is ICH7 compatible and the other is ICH9 compatible. Change 'pch_version' to 'ich_version' to better match its original name. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05spi: ich: Use compatible strings to distinguish controller versionBin Meng
At present ich spi driver gets the controller version information via pch, but this can be simply retrieved via spi node's compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Simon Glass <sjg@chromium.org>
2016-02-05spi: ich: Some clean upBin Meng
This cleans up the ich spi driver a little bit: - Remove struct ich_spi_slave that is not referenced anywhere - Remove ending period in some comments - Move struct ich_spi_platdata and struct ich_spi_priv to ich.h - Add #ifndef _ICH_H_ .. in ich.h Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-02-04Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2016-02-04Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2016-02-04Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"Dinh Nguyen
Apparently, the logic for the FPGA global bit is not universal between Gen5 and Gen10 devices is not the same. Disabling this bit, while applicable to Gen10 devices, will break FPGA programming on Gen5 devices. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-02-04usb: gadget: dwc2_udc_otg: modified the check condition for max packet size ↵Frank Wang
of ep_in in high speed In current high speed fastboot, fs_ep_in.wMaxPacketSize is configured 64 bytes as default, as a result, it failed to match the size at initialization stage in usb controller. Actually, hardware can support less than or equal to 512 bytes in high speed mode, so I changed the condition from '!=' to '>' to fix this issue. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Tested-by: Steve Rae <srae@broadcom.com>
2016-02-02dm: vybrid_gpio: Drop legacy codeBhuvanchandra DV
All boards using this driver are with device tree support, hence drop the legacy code in driver to have a pure DT solution. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-02-02dm: lpuart: Drop the legacy codeBhuvanchandra DV
All boards using this driver are with device tree support, hence drop the legacy code in driver to have a pure DT solution. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-02-02Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2016-02-02Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2016-02-02atmel_nand: Add 32 bit ecc support for sama5d2 chipJosh Wu
Also if minimum ecc requirment is bigger then what we support, then just use our maxium pmecc support. But it is not safe, so we'll output a warning about this. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-02atmel_nand_ecc: update pmecc registers according to sama5d2 chipJosh Wu
1. add the pmecc register mapping for sama5d2. 2. add the pmecc error location register mapping for sama5d2. 3. add some new field that is different from old ip. 4. add sama5d2 pmecc ip version number. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-01drivers: net: Add ethernet driver for Microchip PIC32.Purna Chandra Mandal
This driver implements MAC and MII layer of the ethernet controller. Network data transfer is handled by controller internal DMA engine. Ethernet controller is configurable through device-tree file. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-02-01drivers: net: phy: add SMSC LAN8740 Phy support.Purna Chandra Mandal
Add SMSC LAN8740 Phy support required for PIC32MZDA devices. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-02-01drivers: mmc: add driver for Microchip PIC32 SDHCI controller.Andrei Pistirica
This driver implements platform specific glue and fixups for PIC32 internal SDHCI controller. Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
generated by cgit (git 2.34.1) at 2024-12-27 18:44:33 +0000