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2018-12-28video: Add a default TrueType fontSimon Glass
At present it is possible to enable TrueType support but not include any fonts. This results in a blank display. Select Nimbus as the default font to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-27power: regulator: Return success on attempt to disable an always-on regulatorLokesh Vutla
commit 4f86a724e82c0 ("power: regulator: denied disable on always-on regulator") throws an error when requested to disable an always-on regulator. It is right that an always-on regulator should not be attempted to be disabled. But at the same time regulator framework should not return an error when such request is received. Instead it should just return success without attempting to disable the specified regulator. This is because the requesting driver will not have the idea if the regulator is always-on or not. The requesting driver will always try to enable/disable regulator as per the required flow. So it is upto regulator framework to not break such scenarios. Fixes: 4f86a724e82c0 ("power: regulator: denied disable on always-on regulator") Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-12-26phy: Fix u-boot coruption when fixed-phy is usedMichal Simek
When fixed-link phy is used subnode offset is used as phy address. This number is bigger then space allocated for bus structure (allocated via mdio_alloc). bus->phymap[] array has PHY_MAX_ADDR size (32). That's why writing bus->phymap[addr] where addr is < 0 or > PHY_MAX_ADDR is causing write to memory which can caused full U-Boot crash. The patch is checking if address is in correct range. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-12-26dm: pinctrl: Prevent (re-)configuring pins when already done before relocationLukasz Majewski
This commit prevents from re-configuring pins if those were configured before relocation. Some pins - like UART or DDR must be setup before relocation (as they have 'u-boot,dm-pre-reloc' property set in DTS). Without this change, those pins are re-configured after relocation (pre_reloc_only = 0, so we do not "continue"). Such behavior may be a problem for DDR PAD configuration, as they might be already leveled/tuned with original setup). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-12-21Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- stratix10 updates
2018-12-21Merge tag 'mips-updates-for-2019.11' of git://git.denx.de/u-boot-mipsTom Rini
- mips: fix some DTC warnings - bmips: bcm6348: add DMA driver - bmips: bcm5348: add ethernet driver - bmips: bcm6368: add ethernet driver - mips: mt76xx: fix DMA problems, disable CONFIG_OF_EMBED - mips: mscc: add support for Microsemi Ocelot and Luton SoCs - mips: mscc: add support for Ocelot and Luton evaluation boards - mips: jz47xx: add basic support for Ingenic JZ4780 SoC - mips: jz47xx: add support for Imgtec Creator CI20 board
2018-12-20arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device tableAng, Chee Hong
Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-20arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration DriverAng, Chee Hong
Enable FPGA reconfiguration support for Stratix 10 SoC. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
2018-12-19mmc: Add JZ47xx SD/MMC controller driverPaul Burton
Add driver for the JZ47xx MSC controller. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19misc: Add JZ47xx efuse driverPaul Burton
Add driver for the efuse block in the JZ47xx SOC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19gpio: mscc-bitbang-spi: Add a simple gpio driver for bitbgang spiGregory CLEMENT
The VCore III SoCs such as the Luton but also the Ocelot can remap an SPI flash directly in memory. However, for writing in the flash the communication has to be done by software. Each of the signal used for the SPI are exposed in a single register. In order to be able to use the soft-spi driver, the management of this pin is done through this simple gpio driver. Even if the main purpose of this driver is to be used by soft-spi, it can still be used as a normal gpio driver but with limitation: for example the first pin can't be used as output. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19pinctrl: mscc: Add gpio and pinctrl driver for MSCC MIPS SoCs (VcoreIII based)Gregory CLEMENT
This driver supports the pin and gpio controller found in the Ocelot and Luton SoCs. The driver was inspired from the pinctrl driver in Linux, but was simplified and was modified to allow supporting an other SoCs (Luton). For Ocelot and Luton the controller is the same, only the pins to program differ. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19DW SPI: Allow to overload the management of the external CSGregory CLEMENT
On some platforms, as the Ocelot ones, when wanting to control the CS through software, it is not possible to do it through the GPIO controller. Indeed, this signal is managed through a dedicated range of registers inside the SoC.. By declaring the external_cs_manage function as weak, it is possible to manage the CS at platform level and then using the appropriate registers. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19net: add support for bcm6368-enetÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19net: add support for bcm6348-enetÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-19dma: add bcm6348-iudma supportÁlvaro Fernández Rojas
BCM6348 IUDMA controller is present on multiple BMIPS (BCM63xx) SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-12-18drivers: serial: Add SiFive UART driverAnup Patel
This patch adds SiFive UART driver. The driver is 100% DM driver and it determines input clock using clk framework. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-18timer: Add generic driver for RISC-V privileged architecture defined timerBin Meng
RISC-V privileged architecture v1.10 defines a real-time counter, exposed as a memory-mapped machine-mode register - mtime. mtime must run at constant frequency, and the platform must provide a mechanism for determining the timebase of mtime. The mtime register has a 64-bit precision on all RV32, RV64, and RV128 systems. Different platform may have different implementation of the mtime block hence an API riscv_get_time() is required by this driver for platform codes to hide such implementation details. For example, on some platforms mtime is provided by the CLINT module, while on some other platforms a simple 'rdtime' can be used to get the timer counter. With this timer driver the U-Boot timer functionalities like delay works correctly now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-18cpu: Add a RISC-V CPU driverBin Meng
This adds a driver for RISC-V CPU. Note the driver will bind a RISC-V timer driver if "timebase-frequency" property is present in the device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
2018-12-15Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- Second half of the USB Gadget DM conversion
2018-12-15syscon: update syscon_node_to_regmap to use the DM functionsPatrick Delaunay
+ Update the function syscon_node_to_regmap() to force bound on syscon uclass and directly use the list of device from DM. + Remove the static list syscon_list. This patch avoid issue (crash) when syscon_node_to_regmap() is called before and after reallocation (list content is invalid). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-12-15serial: serial_stm32: Add reset supportPatrice Chotard
In some cases, UART is configured by early boot stage. To be sure of the initial state of UART and to avoid spurious chars on console, reset the serial block before configuring it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-15tee: change return code for REE FS supplicant cmdIgor Opaniuk
If OP-TEE core is compiled with support of REE FS and RPMB at the same time (CFG_RPMB_FS ?= y; CFG_RPMB_FS ?= y), and persistent storage API is used with TEE_STORAGE_PRIVATE storage id, it will lead to TA panic. E/TC:? 0 TA panicked with code 0xffff0009 ..... E/TC:? 0 Call stack: E/TC:? 0 0x000000004002f2f8 TEE_OpenPersistentObject at lib/libutee/tee_api_objects.c:422 In this particular case TEE_ERROR_STORAGE_NOT_AVAILABLE is more suitable than TEE_ERROR_NOT_IMPLEMENTED, as it provides to a TA a possibility to handle this error code [1]. >From GPD TEE Internal Core specification [2]: TEE_ERROR_STORAGE_NOT_AVAILABLE - if the persistent object is stored in a storage area which is currently inaccessible. It may be associated with the device but unplugged, busy, or inaccessible for some other reason. [1]: https://github.com/OP-TEE/optee_os/blob/94db01ef448d1e552161c2d861d57a5f8bda0cc0/lib/libutee/tee_api_objects.c#L419 [2]: https://globalplatform.org/wp-content/uploads/2018/06/GPD_TEE_Internal_Core_API_Specification_v1.1.2.50_PublicReview.pdf Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-12-14usb: musb-new: sunxi: Fix null pointer accessStefan Mavrodiev
When the device is in peripheral mode there is no struct usb_bus_priv allocated pointer, as the uclass driver ("usb_dev_generic") doesn't call per_device_auto_alloc_size. This results in writing to the internal SDRAM at priv->desc_before_addr = true; Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
2018-12-14usb: composite: Fix max packet size for USB3.0Siva Durga Prasad Paladugu
For USB3.0, the max packetsize for GET_DESCRIPTOR should be sent as exponent value for 2. This means for 512, max packet size should be filled with 9(2^9=512). Also, fill the USB version field with 3.0 if speed is negotiated to Superspeed. This fixes the issue of DFU gadget download failure with superspeed. Without this patch, the max packet size is overflowed to zero as the bMaxPacketsize is of u8 and hence host is not able to detect this device. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-14usb: musb-new: Add support for DM_USBJean-Jacques Hiblot
Enable DM for USB peripheral in the musb-new driver. Also make sure that the driver can be used in the SPL. This implies that: * the driver must work with and without the OF_CONTROL option. That in turn, implies that the platform data can be passed in a struct ti_musb_platdata or be read from the dtb * usb.o is linked in the SPL if host support is enabled Another change is that the driver does not fail to bind (and stop the boot process) if one of the child driver does not bind. Reporting the error is enough. This kind of error would appear if the port is configured in the DTS but the driver is not activated in the config. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14usb: musb-new: Allow the diver not to use the set_phy_power() callbackJean-Jacques Hiblot
The set_phy_power() callback is part of struct omap_musb_board_data. This structure is part of the platform data passed to the musb-new driver. This does not really fit with the Driver Model, so allow not to use struct omap_musb_board_data to turn the phy on or off. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14dwc3-generic: Add support for the am437xJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14phy: omap_usb2: Add support for am437xJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14spl: drivers: Link usb common library to SPL if USB gadget is enabledJean-Jacques Hiblot
Some drivers might need to access common USB functions such as usb_get_maximum_speed() or usb_get_dr_mode(). Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14usb: host: replace xhci-keystone driver by the generic dwc3 driverJean-Jacques Hiblot
The keystone platforms can use the generic DC3 driver. Removing the keystone-spcecific xchi driver and add the configuration options to enable the generic DWC3 driver on all K2 platforms. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14PHY: Add phy driver for the keystone USB PHYJean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14usb: dwc3-generic: make it compatible with "ti, keystone-dwc3"Jean-Jacques Hiblot
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14usb: musb: Remove legacy CONFIG_USB_DA8XXAdam Ford
There don't appear to be any boards enabling CONFIG_USB_DA8XX, and there is a newer version of the MUSB driver, so let's remove the legacy version of it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-14usb: musb: Remove Legacy CONFIG_USB_DAVINCIAdam Ford
This patch removes CONFIG_USB_DAVINCI. It's a legacy option that isn't defined anywhere, and there is a newer MUSB driver. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-14usb: Don't enable CONFIG_SPL_DM_USB for non-DM SPLMartyn Welch
When CONFIG_SPL_DM_USB was added, it was added defaulted on without protection to ensure it didn't get set for non-DM SPL builds. This leads to unexpected and confusing failures when building a DM based U-Boot but with a non-DM SPL, as the defconfig is unlikely to have CONFIG_SPL_DM_USB actively disabled. Tweak the Kconfig to not enable this setting unless CONFIG_SPL_DM is set. Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2018-12-14usb: composite: Move bitmap related operations to ./include/linux/bitmap.hLukasz Majewski
The BITMAP related operations can now be moved to ./include/linux/bitmap.h file to mimic the Linux kernel directory tree. This change also allows to remove the lin_gadget_compat.h header file (which is a legacy code only for composite U-boot layer). It was also possible to remove #includes from several USB gadget drivers. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2018-12-14usb: gadget: f_sdp: Provide filesize env variable for downloaded imagesPetr Štetiar
Currently it's not possible to get filesize of downloaded images and it's impossible to automate some tasks in scripts. So this patch adds `filesize` environment variable with size (as hex number in bytes) of the last successfully downloaded file via `sdp` command. Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Petr Štetiar <ynezz@true.cz> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2018-12-13dm: sound: Use the correct number of channels for soundSimon Glass
At present the 'beep' sound generates a waveform for only one channel even if two are being used. This means that the beep is twice the frequency it should be. Correct this by making it a parameter. The fix in a previous commit was correct for sandbox but not for other boards. Fixes: 03f11e87a8 ("sound: Correct data output in sound_create_square_wave()") Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sandbox: Allow selection of sample rate and channelsSimon Glass
At present these parameters are hard-coded in the sdl interface code. Allow them to be specified by the driver instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: max98095: Tidy up error codesSimon Glass
Return a valid error code instead of -1. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: Fix license headersSimon Glass
Fix a few files whos license headers were not converted to SPDX. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: Complete migration to driver modelSimon Glass
All users of sound are converted to use driver model. Drop the old code and the CONFIG_DM_SOUND option. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: exynos: sound: Convert to use driver modelSimon Glass
Update snow's device tree and config to use driver model for sound. Also update the others as best we can. Spring does not appear to have audio support in the kernel. The smdk5250 and smdk5420 boards use a wolfson codec which I cannot test with. So the only boards that is tested and known to work are snow, pit and pi. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: exynos: Add support for max98090Simon Glass
Add support for this new codec which is used by pit. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: Move common code out of maxim98095Simon Glass
The register-access code is useful for any maxim codec. Move it out into its own file. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: Add conversion to driver modelSimon Glass
Move the existing hardware drivers over to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: Start i2c IDs from 0Simon Glass
The current ID enums start from 1 but there does not seem to be any reason that they cannot start with 0. Adjust the code to avoid the +1 in codec_init(). Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: core: Add a function to read into a unsigned intSimon Glass
The current dev_read...() functions use s32 and u32 which are convenient for device tree but not so useful for normal code, which often wants to use normal integers for values. Add a helper which supports returning an unsigned int. Also add signed versions of the unsigned readers. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-13dm: sound: Create a uclass for soundSimon Glass
The sound driver pulls together the audio codec and i2s drivers in order to actually make sounds. It supports setup() and play() methods. The sound_find_codec_i2s() function allows locating the linked codec and i2s devices. They can be referred to from uclass-private data. Add a uclass and a test for sound. Signed-off-by: Simon Glass <sjg@chromium.org>