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2018-03-21phy: add support for bcm6358 usbh phyÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-03-21phy: add support for bcm6348 usbh phyÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-03-21dm: cpu: bmips: add BCM6362 supportÁlvaro Fernández Rojas
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-03-19Merge git://git.denx.de/u-boot-usbTom Rini
2018-03-19Merge git://git.denx.de/u-boot-sunxiTom Rini
2018-03-19nand: Remove unused ppc4xx NAND driver and referencesStefan Roese
ppc4xx support was removed some time ago. Lets remove the now unused NAND driver and all its references for this platform as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Scott Wood <oss@buserror.net>
2018-03-19clk: stm32mp1: add clock tree initializationPatrick Delaunay
add binding and code for clock tree initialization from device tree Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19clk: add driver for stm32mp1Patrick Delaunay
add RCC clock driver for STMP32MP157 - base on driver model = UCLASS_CLK - support ops to enable, disable and get rate of all SOC clock needed by U-Boot Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19reset: stm32: adapt driver for stm32mp1Patrick Delaunay
- move to livetree and allow to get address to parent - add stm32mp1 compatible for probe Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19pinctrl: stm32: update pincontrol for stmp32mp157Patrick Delaunay
- add the 2 new compatible used by STM32MP157 "st,stm32mp157-pinctrl" "st,stm32mp157-z-pinctrl" - update the mask for the port Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19pmic: add stpmu1 supportPatrick Delaunay
This driver implements register read/write operations for STPMU1. The STPMU1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches. It is accessed via an I2C interface. This device is used with STM32MP1 SoCs. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19ram: stm32mp1: add driverPatrick Delaunay
Add driver and binding for stm32mp1 ddr controller and phy Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19arm: stm32: add new architecture for STM32MP familyPatrick Delaunay
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A - support for stm32mp157 SOC - SPL is used as first boot stage loader - using driver model for all the drivers, even in SPL - all security feature are deactivated (ETZC and TZC) - reused STM32 MCU drivers when it is possible Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19stm32mp: stm32f7_i2c: use calloc instead of kmallocPatrick Delaunay
Kmalloc is using memalign allocation function. It is not necessary to align this structure so to save bytes, we move to calloc. And kmalloc function can't be used in SPL early stage (in board_init_f()) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19gpio: stm32f7_gpio: handle node ngpiosPatrick Delaunay
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19dm: gpio: Convert stm32f7 driver to livetreePatrick Delaunay
Update the GPIO driver to support a live device tree. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19spl: add SPL_RESET_SUPPORTPatrick Delaunay
Add option to include RESET driver and uclass in SPL. That can be useful to handle IP reset with same driver in U-Boot and in SPL. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19sunxi: Add AXP_PMIC_BUS kconfig entryJagan Teki
Add simple and meaningful kconfig option for pmic_bus.c instead of using MACH type on Makefile. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19video: stm32: stm32_ltdc: set the blending factoryannick fertre
Set the blending factor regarding the pixel format Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19video: stm32: stm32_ltdc: missing set of line interrupt positionyannick fertre
Set LIPCR (line interrupt position conf) register with line length. Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19video: stm32: stm32_ltdc: set rate of the pixel clockyannick fertre
pxclk is useless to set pixel clock. Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19video: stm32: stm32_ltdc: update file header & footeryannick fertre
Modified copyright & driver name. Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19video: stm32: stm32_ltdc: add resetyannick fertre
Add reset of LTDC display controller. Signed-off-by: yannick fertre <yannick.fertre@st.com>
2018-03-19video: exynos: remove redundant assignmentsHeinrich Schuchardt
No need to initialize variables if the next usage is an assignment. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19video, da8xx-fb: fix time out in wait_for_event()Heinrich Schuchardt
If an event does not occur the current coding stays in an endless loop. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19video: stb_truetype: simplify expressionHeinrich Schuchardt
Eliminate (x2 - x2) which is always zero. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-19video: cfb_console: simplify logical constraintHeinrich Schuchardt
(A || !A && B) == (A || B) Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-17usb: dwc2: Replace printf, pr_err by dev_info, dev_errPatrice Chotard
Replace printf() call by dev_info() and pr_err() by dev_err() Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: dwc2: increase timeout in wait_for_chhltdChristophe Kerello
This patch increases timeout to 2s. It was seen on 2 USB devices (Verbatim STORE N GO 070B4AED0FB22358 and USB DISK 2.0 9000729BA41DDF40) that the request sense command takes between 1.3s and and 1.5s. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: dwc2: disable external vbus supply when the device is removedChristophe Kerello
This patch adds an interface to disable the power in dwc2 driver. This new interface is called when the device is removed. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: ohci-generic: replace pr_err() by dev_err()Patrice Chotard
As we get access to struct udevice, use dev_err() instead of pr_err(). Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: ohci-generic: factorize PHY operationPatrice Chotard
Factorize PHY get/init/poweron and PHY poweroff/exit operations into separate function, it simplify the error path. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: ohci-generic: handle phy power on/offPatrice Chotard
Add generic_phy_power_on() and generic_phy_power_off() calls to switch ON/OFF phy during probe and remove functions. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: ehci-generic: replace pr_err() by dev_err()Patrice Chotard
As we get access to struct udevice, use dev_err() instead of pr_err(). Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: ehci-generic: factorize PHY operationPatrice Chotard
Factorize PHY get/init/poweron and PHY poweroff/exit operations into separate function, it simplify the error path. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: ehci-generic: handle phy power on/offPatrice Chotard
Add generic_phy_power_on() and generic_phy_power_off() calls to switch ON/OFF phy during probe and remove functions. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-03-17usb: Remove unused ppc4xx EHCI host driverStefan Roese
ppc4xx support was removed some time ago. Lets remove the now unused EHCI driver and all its references for this platform as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Marek Vasut <marex@denx.de>
2018-03-17ubs: xhci-dwc3: Enable USB3 PHY when availableVignesh R
DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to USB2 PHY, to be functional. Therefore enable USB3 PHY when available. Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-03-17usb: xhci-dwc3: Refractor PHY operations into separate functionVignesh R
Refractor PHY get/init/poweron and PHY poweroff/exit operations into separate function so that its easy to support multiple PHYs. Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-03-17usb: xhci-dwc3: Power on USB PHY before usingVignesh R
It is wrong that expect .phy_init() to also power on the PHY. Therefore, explicitly, call generic_phy_power_on() after generic_phy_power_init() in order to power on PHY before using it. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-17usb: dwc2: Allow selection of data buffer sizeAlexey Brodkin
If we use hardware with very small RAM (let's consider just a couple of hundreds of kB but not megabytes) it is not super convenient to lose 64kB for statically allocated bufer which most probably won't be used as big as it is. Typically we'll have much shorter data packages to excahnge and in the worst case longer packets will be split on separate transactions. For those corner-cases user will be able to set his buffer size of choice via USB_DWC2_BUFFER_SIZE option in menuconfig. By default we'll use 64 kB as it was hard-coeded before so existing users shouldn't be affected at all. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Marek Vasut <marex@denx.de>
2018-03-16Convert all of CONFIG_CONS_INDEX to KconfigTom Rini
This converts the following to Kconfig: CONFIG_CONS_INDEX We have existing entries for this option in a number of places, with different guards on them. They're also sometimes used for things not directly inside of the serial driver. First, introduce a new symbol to guard the use of CONFIG_CONS_INDEX, so that in the case where we don't need this for the serial driver, but for some other use, we can still do it. Next, consolidate all of these into the single entry in drivers/serial/Kconfig. Finally, introduce CONS_INDEX_[023456] so that we can imply a correct value here to make the defconfig side of this smaller. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rework a lot of the logic here, such that I took authorship from Adam, but kept his S-o-B line] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-16watchdog: omap_wdt: improve watchdog reset pathRuslan Bilovol
Remove busy looping during watchdog reset. Each polling of W_PEND_WTGR bit ("finish posted write") after watchdog reset takes 120-140us on BeagleBone Black board. Current U-Boot code has watchdog resets in random places and often there is situation when watchdog is reset few times in a row in nested functions. This adds extra delays and slows the whole system. Instead of polling W_PEND_WTGR bit, we skip watchdog reset if the bit is set. Anyway, watchdog is in the middle of reset *right now*, so we can just return. This noticeably increases performance of the system. Below are some measurements on BBB: - DFU upload over USB 15% faster - fastboot image upload 3x times faster - USB ep0 transfers with 4k packets 20% faster Signed-off-by: Ruslan Bilovol <ruslan.bilovol@gmail.com> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-03-16clk: at91: clk-system: add set/get_rate operationsWenyou Yang
To support set/get the clock rate, add set/get_rate operations. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2018-03-16clk: at91: add PLLADIV driverWenyou Yang
As said in the SAMA5D2 datasheet, the PLLA clock must be divided by 2 by writing the PLLADIV2 bit in PMC_MCKR, if the ratio between PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2018-03-16clk: at91: add USB Host clock driverWenyou Yang
Add USB clock driver to configure the input clock and the divider in the PMC_USB register to generate a 48MHz and a 12MHz signal to the USB Host OHCI. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2018-03-15Merge git://git.denx.de/u-boot-spiTom Rini
2018-03-14spi: omap3: Fix redeclared errorJagan Teki
omap3_spi_set_speed|mode redeclared bus symbol, fix the same. error: drivers/spi/omap3_spi.c: In function ‘omap3_spi_set_speed’: drivers/spi/omap3_spi.c:650:18: error: ‘bus’ redeclared as different kind of symbol struct udevice *bus = dev->parent; Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-14Merge git://git.denx.de/u-boot-sunxiTom Rini
2018-03-13arch-stm32: Factorize stm32.h for STM32F4 and F7Patrice Chotard
For STM32F4 and F7 SoCx family, a specific stm32.h file exists. Some common defines are duplicated or even unused in each of these stm32.h. Factorize all common definition in arch/arm/include/asm/stm32f.h and keep specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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