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- DM_I2C_COMPAT removal for all ti platforms from Jean-Jacques Hiblot
- Fix in i2c command help output from Chirstoph Muellner.
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- DWC3 and UDC cleanup
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This adds a driver for the FAN53555 family of regulators and wraps it
in a PMIC implementation.
While these devices support a 'normal' and 'suspend' mode (controlled
via an external pin) to switch between two programmable voltages, this
incarnation of the driver assumes that the device is always operating
in 'normal' mode.
Only setting/reading the programmed voltage is supported at this time
and the following device functionality remains unsupported:
- switching the selected voltage (via a GPIO)
- disabling the voltage output via software-control
This matches the functionality of the Linux driver.
Tested on a RK3399-Q7 (with 'option 5' devices): setting voltages from
the U-Boot shell and verifying output voltages on the board.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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This implements a driver using a RTC-based backing store for the DM
bootcount implementation. The node configuring this feature will be
compatible with 'u-boot,bootcount-rtc' and the underlying RTC device
shall be reference through the property 'rtc'. An offset into the RTC
device's register space can be provided through the 'offset' property.
Tested on a RK3399-Q7 on a Flamingo carrier board using the SRAM area
of the carrier board's RV3029 RTC.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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The original bootcount methods do not provide an interface to DM and
rely on a static configuration for I2C devices (e.g. bus, chip-addr,
etc. are configured through defines statically). On a modern system
that exposes multiple devices in a DTS-configurable way, this is less
than optimal and a interface to DM-based devices will be desirable.
This adds a simple driver that is DM-aware and configurable via DTS.
If ambiguous (i.e. multiple bootcount-devices are present) the
/chosen/u-boot,bootcount-device property can be used to select one
bootcount device.
Initially, this provides support for the following DM devices:
* RTC devices
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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Patch for rk322x TPL is not merged, and only SPL is available now,
enable the sdram driver in SPL first. We should update back to TPL
after TPL is enabled for rk322x.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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To reset the DM after a new dtb is loaded, we need to call dm_uninit()
and then dm_init(). This fails however because gd->dm_root is not nullified
by dm_uninit().
Fixing it by setting gd->dm_root in dm_uninit().
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
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It is currently not possible to include the support to remove devices in
the SPL. This is however needed by platforms that re-select their dtb after
DM is initialized; they need to remove all the previously bound devices
before triggering a scan of the new DT.
Add a Kconfig option to be able to include the support for device removal
in the SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Seeries-changes:3
- update commit message
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Those driver are not DM drivers per se (not using the PMIC/regulator
framework) and are using the legacy I2C API. Make them compatible with
the DM_I2C API.
This impacts the following drivers:
- palmas (used by am57xx/dra7xx evms)
- tps65218 (used by am43xx evms)
- tps65217 and tps65910 (used by am335x evms and am335x boneblack vboot)
- twl4030 (used by omap3_logicpd)
- tps65217 (used by brppt1)
- twl6030
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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This allows the driver to be used without OF_CONTROL.
AM335x support DM_SPL but does not use SPL_OF_CONTROL. Enabling DM_I2C in
SPL thus requires that the omap I2C can be passed platdata.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Move away from SoC specific headers to handle different register layout.
Instead use driver data to get appropriate register layouts like in the
kernel. While at it, perform some mostly cosmetic alignment/cleanup in
the functions being updated.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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If OF_CONTROL is not enabled and DM_SEQ_ALIAS is enabled, we must
assign an alias (requested sequence number) to devices that belongs to a
class with the DM_UC_FLAG_SEQ_ALIAS flag. Otherwise
uclass_find_device_by_seq() cannot be used to get/probe a device. In
particular i2c_get_chip_for_busnum() cannot be used.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
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i2c_get_chip_for_busnum() really should check the presence of the chip on
the bus. Most of the users of this function assume that this is done.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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This was unintentionally removed when syncing with upstream.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
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- Sync DDR training with Marvell code for Armada 38x by Chris
- Misc updates to Armada 38x Helios4 board by Aditya
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This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").
The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:
ddr3: add missing txsdll parameter
ddr3: fix tfaw timimg parameter
ddr3: fix trrd timimg parameter
merge ddr3 topology header file with mv_ddr_topology one
mv_ddr: a38x: fix zero memory size scrubbing issue
The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef
find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
-UA70X0
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
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- Various axp209 fixes
- Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
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Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family
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Some boards feature a capacitance on LDO3's output that is too large,
causing inrush currents which as a result, shut down the AXP209. This
has been reported before, without knowing the actual cause.
A fix appeared to be done with
commit 0e6e34ac8dbb ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").
The description there is a bit misleading, the kernel does not hang
during AXP209 initialization, the PMIC shuts down, causing voltages to
drop and thus the whole system freezes.
While the AXP209 does have the ability to ramp up the voltage slowly, to
reduce these inrush currents, the voltage rate control (VRC) however is
not applicable when switching on the LDO3 output. Only when going from
an enabled lower voltage setting, to a higher voltage setting is the VRC
in effect.
To work around this problem, we set LDO3 to the lowest possible setting
of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do
its thing. It should be noted, that for some undocumented reason, there
is a short delay needed between setting the LDO3 voltage register and
enabling the power. One would expect that this delay ought to be just
after enabling the output power at 0.7 V, but this did not work.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.
This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.
There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.
In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Use a define for the chip version mask on the axp209.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon
device from a reference in the DTS. It operates similarly to the linux
version of the namesake function.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The error is:
In file included from include/part.h:10:0,
from include/usb.h:18,
from include/linux/usb/gadget.h:22,
from drivers/usb/dwc3/ep0.c:20:
include/ide.h:62:14: error: unknown type name ‘uchar’
void ide_led(uchar led, uchar status);
Fixing it by including common.h that defines the uchar type.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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The select_dr_mode operation is executed when the glue driver is probed.
The role of this optional function is to configure the operating mode
of the controller at the glue level.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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This make the driver more generic. At this point this driver can replace
the dwc3-of-simple implementation.
Make the description in the Kconfig more generic too.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.
Also move the generic DM code for USB gadgets in a separate file for
clarity.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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Those operations can be used for peripheral operation as well as host
operation.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
# Conflicts:
# drivers/usb/dwc3/core.c
# drivers/usb/host/xhci-dwc3.c
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The driver will be probed when usb_gadget_initialize() is called.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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usb_gadget_initialize()/_release()/_handle_interrupt()
When DM_USB_GADGET the platform code for the USB device must be replaced by
calls to a USB device driver.
usb_gadget_initialize() probes the USB device driver.
usb_gadget_release() removes the USB device driver.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
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Using CONFIG_DM_USB for this purpose prevents using DM_USB for host and not
for device.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
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Add 2 functions to wrap the calls to board_usb_init() and
board_usb_cleanup().
This is a preparatory work for DM support for UDC drivers (DM_USB_GADGET).
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
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This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.
Signed-off-by: Felix Brack <fb@ltec.ch>
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Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
be updated.
stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
the corresponding bank gpio device and the gpio_offset inside this
gpio bank.
Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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To allow access to this define by other driver, move
it into gpio.h
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.
For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Move gpio_dev list filling outside probe() to speed-up U-boot
boot sequence execution. This list is populated only when needed.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Add a sandbox DMA driver implementation (provider) and corresponding DM
test.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
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This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).
DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(),
minor clean up]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
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The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven correctly because the shifting is already 0).
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Protect configuration registers with a hardware spinlock.
If a hwspinlock is defined in the device-tree node used it
to be sure that none of the others processors on the SoC could
change the configuration at the same time.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
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Implement hardware spinlock support for STM32MP1.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
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