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2011-02-06Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk
2011-02-04Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk
2011-02-03fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)Kumar Gala
Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8, and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-02Minor Coding Style Cleanup.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-02-02spi: add support SuperH SPI moduleYoshihiro Shimoda
SH7757 has SPI module. This patch supports it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02net: sh_eth: add cache handlingYoshihiro Shimoda
Some CPU needs cache handling. So this patch add the config of CONFIG_SH_ETHER_CACHE_WRITEBACK, and it calls wback function. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-02-02S5P: serial: Use the inline function instead of static valueMinkyu Kang
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-02-02DaVinci DM6467: Added ET1011C (LSI) PHY supportSandeep Paulraj
Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling ET1011C gigabit phy. which overrides get_link_speed function from default implementation. This enables output of 125 MHz reference clock on SYS_CLK pin. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02DaVinci EMAC: Add name to Ethernet deviceSandeep Paulraj
Adds "DaVinci-EMAC" as the name of the device so that it gets printed as "Using DaVinci-EMAC device" during network access (dhcp, tftp) instead of empty name in "Using" statement.This name also gets reflected in 'ethact' env variable. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02DaVinci EMAC: Fix davinci_eth_gigabit_enableSandeep Paulraj
Enabling the gigabit was overwriting the previous configuration by setting up only GIGAFORCE and GIG bits of MAC control register. Modified to retain previous configuration while gigabit enabling. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02Davinci MMCSD SupportSandeep Paulraj
Added support for MMC/SD cards for Davinci. This feature is enabled by CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC options. This is tested on DM355 and DM365 EVMs with both the available mmc controllers. Signed-off-by: Alagu Sankar <alagusankar@embwise.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-02MXC: removed warnings from IMX51 ATA driverStefano Babic
Drop warnings due to unused variables. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
2011-02-02SPI: mxc_spi: replace fixed offsets with structuresStefano Babic
This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02SPI: mxc_spi: add SPI clock calculation and setup to the driverAnatolij Gustschin
The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx caseAnatolij Gustschin
We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de>
2011-02-02SPI: mxc_spi: add support for i.MX35 processorStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02Add basic support for Freescale's mc9sdz60Stefano Babic
The patch adds helper funtions for basic access to the registers of the MC9sdz60 chip (multifunctional device with RTC and CAN) via I2C interface. Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02I2C: mxc_i2c: address failure with mx35 processorStefano Babic
There is sporadic failures when more as one I2C slave is on the bus and the processor tries to communicate with more as one slave. The problem was seen on a mx35pdk (two I2C slaves, PMIC controller and CAN/RTC chip). The current driver uses the IIF bit in the status register to check if the bus is busy or not. According to the manual, this is not correct, because the IIB bit should be checked. Not only, to check if a transfer is finished must be checked the ICF bit, and this is not tested at all. This patch comes from analyse with a corresponding driver provided by Freescale as part of the LTIB tool. Comparing the two drivers, it appears that the current u-boot driver checks the wrong bits, and depending on race condition, the transfer can be successful or not. The patch gets rid also of own debug function (DPRINTF), replaced with the general debug(). Tested on Freescale mx35pdk. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2011-02-02I2C: mxc_i2c: get rid of __REG accessStefano Babic
This driver accesses to processor's register via __REG macros, that are removed (or are planned to be removed) and replaced by C structures. This patches replaces all occurrencies of __REG macros. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2011-02-02mxc_i2c: Add support for the i.MX35 processorStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2011-02-02serial_mxc: add support for Freescale's i.MX35 processorStefano Babic
The patch adds UART support for the i.MX35 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02mxc_nand: add support for i.MX35 processorStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
2011-02-02BLOCK: Add freescale IMX51 PATA driverMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
2011-02-02fsl_pmic: add I2C interface supportLiu Hui-R64343
This patch add I2C interface for fsl_pmic driver support Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02mxc_i2c: add support for MX53 processorLiu Hui-R64343
This patch add I2C support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02mxc_gpio: add support for MX53 processorLiu Hui-R64343
This patch add mxc_gpio support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02serial_mxc: add support for MX53 processorLiu Hui-R64343
This patch add UART support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02fec_mxc: add support for MX53 processorLiu Hui-R64343
This patch add FEC support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
2011-01-27Fix at91 includes in soft_i2c driverRyan Mallon
Make at91 header includes in soft_i2c depend only on CONFIG_AT91FAMILY rather than individual SoCs. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Acked-by: Reinhard Meyer<u-boot@emk-elektronik.de>
2011-01-25ftpmu010: support faraday ftpmu010 driverMacpaul Lin
Faraday's ftpmu010 is a power managemnet unit which support cpu sleep and frequency scaling. It has been integrated into many SoC. This patch also move ftpmu010 to a proper place for later enhancement. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-01-25UEC: Fix compiler warnings introduced by linux/mii.h changeKumar Gala
Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced the following compiler warnings in the uec ethernet driver: In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec.c:32: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec_phy.c:27: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition Fix them be removing the duplication in the uec code and utlizing the linux/mii.h version instead. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-25Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk
2011-01-19powerpc/8xxx: Introduce 85xx, 86xx, QorIQ config headersKumar Gala
Add new headers that capture common defines for a given SoC/processor rather than duplicating that information in board config.h and random other places. Eventually this should be handled by Kconfig & defconfigs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-19powerpc/p2040: Add various p2040 specific informationKumar Gala
Add P2040 SoC specific information: * SERDES Table * Added p2040 to cpu_type_list and SVR list * Added number of LAWs for p2040 * Set CONFIG_MAX_CPUS to 4 for p2040 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19powerpc/85xx: Add Support for Freescale P1014 ProcessorPoonam Aggrwal
The P1014 is similar to the P1010 processor with the following differences: - 16bit DDR with ECC. (P1010 has 32bit DDR w/o ECC) - no eCAN interface. (P1010 has 2 eCAN interfaces) - Two SGMII interface (P1010 has 3 SGMII) - No secure boot Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19powerpc/85xx: Add Support for Freescale P1010 ProcessorPoonam Aggrwal
Key Features include of the P1010: * e500v2 core frequency operation of 500 to 800 MHz * Power consumption less than 5.0 W at 800 MHz core speed * Dual SATA 3 Gbps controllers with integrated PHY * Dual PCI Express controllers * Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSECs) * TCP/IP acceleration and classification capabilities * IEEE 1588 support * Lossless flow control * RGMII, SGMII * DDR3 with support for a 32-bit data interface (40 bits including ECC), up to 800 MHz data rate 32/16-bit DDR3 memory controller * Dedicated security engine featuring trusted boot * TDM interface * Dual controller area networks (FlexCAN) controller * SD/MMC card controller supporting booting from Flash cards * USB 2.0 host and device controller with an on-chip, high-speed PHY * Integrated Flash controller (IFC) * Power Management Controller (PMC) * Four-channel, general-purpose DMA controller * I2C controller * Serial peripheral interface (SPI) controller with master and slave support * System timers including a periodic interrupt timer, real-time clock, software watchdog timer, and four general-purpose timers * Dual DUARTs Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19USB-CDC: Move MAC addresses setting into usb_eth_initVitaly Kuzmichev
This allows to change device and host MAC addresses without performing reset. Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-01-19USB-CDC: Do not rename netdev after its registrationVitaly Kuzmichev
Calling eth_bind at usb_eth_init time causes renaming of the network device from 'usb_ether' to 'usb0'. Fixing this to keep the first name. Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2011-01-19usb_ether: register usb ethernet gadget at each eth initLei Wen
Since the ether may not be the only one usb gadget would be used in the uboot, it is neccessary to do the register each time the eth begin to work to make usb gadget driver less confussed when we want to use two different usb gadget at the same time. Usb gadget driver could simple ignore the register operation, if it find the driver has been registered already. Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-01-19Replace "FLASH" strings with "Flash" or "flash"Peter Tyser
There's no compelling reason to have the output on bootup or the "flinfo" command print "flash" in uppercase, so use the proper case where appropriate. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2011-01-18NET: lan91c96: Correct chip detect logicYanjun Yang
The lan91c96_detect_chip routine is not correct according to the manual. Signed-off-by: YanJun Yang <yangyj.ee@gmail.com>
2011-01-18rtc: add support for Micro Crystal RV-3029-C2 RTCHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de>
2011-01-17Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk
2011-01-17Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk
2011-01-14fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)Roy Zang
The default value of the SRS, VS18 and VS30 and ADMAS fields in the host controller capabilities register (HOSTCAPBLT) are incorrect. The default of these bits should be zero instead of one. Clear these bits out when we read HOSTCAPBLT. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)Jerry Huang
Do not issue a manual asynchronous CMD12. Instead, use a (software) synchronous CMD12 or AUTOCMD12 to abort data transfer. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14fsl_pci: Update PCIe boot ouputPeter Tyser
This change does the following: - Adds printing of negotiated link width. This information can be useful when debugging PCIe issues. - Makes it optional for boards to implement board_serdes_name(). Previously boards that did not implement it would print unsightly output such as "PCIE1: Connected to <NULL>..." - Rewords the PCIe boot output to reduce line length and to make it clear that the "base address XYZ" value refers to the base address of the internal processor PCIe registers and not a standard PCI BAR value. - Changes "PCIE" output to the standard "PCIe" Before change: PCIE1: connected to <NULL> as Root Complex (base addr ef008000) 01:00.0 - 10b5:8518 - Bridge device 02:01.0 - 10b5:8518 - Bridge device 02:02.0 - 10b5:8518 - Bridge device 02:03.0 - 10b5:8518 - Bridge device PCIE1: Bus 00 - 05 PCIE2: connected to <NULL> as Endpoint (base addr ef009000) PCIE2: Bus 06 - 06 After change: PCIe1: Root Complex of PEX8518 Switch, x4, regs @ 0xef008000 01:00.0 - 10b5:8518 - Bridge device 02:01.0 - 10b5:8518 - Bridge device 02:02.0 - 10b5:8518 - Bridge device 02:03.0 - 10b5:8518 - Bridge device PCIe1: Bus 00 - 05 PCIe2: Endpoint of VPX Fabric A, x2, regs @ 0xef009000 PCIe2: Bus 06 - 06 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14powerpc/fsl-pci: Add generic code to setup PCIe controllersKumar Gala
Since all the PCIe controllers are connected over SERDES on the SoCs we can utilize is_serdes_configured() to determine if a controller is enabled. After which we can setup the ATMUs and LAWs for the controller in a common fashion and allow board code to specify what the controller is connected to for reporting reasons. We also provide a per controller (rather than all) for some systems that may have special requirements. Finally, we refactor the code used by the P1022DS to utilize the new generic code. Based on patch by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-14powerpc/fsl-pci: Determine pci_controller based on cfg addr for dts fixupKumar Gala
Previously we passed in a specifically named struct pci_controller to determine if we had setup the particular PCI bus. Now we can search for the struct so we dont have to depend on the name or the struct being statically allocated. Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct back by searching for it means we can do things like dynamically allocate them or not have to expose the static structures to all users. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-14fsl_esdhc: Fix esdhc disabled problem on some platformsChenhui Zhao
Some new platform's esdhc pins don't share with other function. The eSDHC shouldn't be disabled, even if "esdhc" isn't defined in hwconfig env variable. Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem. Signed-off-by: Chenhui Zhao <b26998@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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