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path: root/include/configs/C29XPCIE.h
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2014-01-24powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mkMasahiro Yamada
Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk because all target boards with mpc85xx cpu define it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-21powerpc/mpc85xx:Increase binary size for P, B & T series boards.Prabhakar Kushwaha
u-boot binary size for Freescale mpc85xx platforms is 512KB. This has been reached to upper limit for some of the platforms causig linker error. So, Increase the u-boot binary size to 768KB. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2014-01-21powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPLPo Liu
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment; Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2013-12-02Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2013-11-25Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-21board/c29xpcie: Add support of 8K page size NAND flashPrabhakar Kushwaha
Defines constants required to support 8K page size NAND flash. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2013-11-04config: remove platform CONFIG_SYS_HZ definition part 1/2Rob Herring
Remove platform CONFIG_SYS_HZ definition for configs A-Z*. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-11-04config: Add a default CONFIG_SYS_PROMPTRob Herring
The definitions for CONFIG_SYS_PROMPT are varied with little reason other than to display the board name. Over half the definitions are "==> ", so make this the default. The rest of the boards remain unchanged to avoid breaking any external scripts expecting a certain prompt. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-10-24powerpc/c29xpcie: add DDR ECC on off config settingPo Liu
c29xpcie REV_A board DDR ECC chip has bad impedance in hardware, force that kind of board to be DDR ECC off when booting. Other version board config ECC on/off by hwconfig=fsl_ddr:ecc=on in uboot enviroment. Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-10-16powerpc:c29xpcie: make ifc timing parameter flexiblePo Liu
This patch re-config the NOR flash timing parameters which could make the ifc timing more flexible for NOR flash. The new parameters could fix the problem of hanging at "Flash:" occasionally when booting the board. Signed-off-by: Po Liu <Po.Liu@freescale.com>
2013-08-12powerpc/mpc85xx: Cleanup license header in source filesYork Sun
Fix the license header introduced by the following patches Add TWR-P10xx board support Add T4240EMU target IDT8T49N222A configuration code Add C29x SoC support Add support for C29XPCIE board Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09powerpc/c29xpcie: add support for C29XPCIE boardMingkai Hu
C29XPCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. It includes C293PCIE board, C293PCIE board and C291PCIE board. - 512KB platform SRAM in addition to 512K L2 Cache/SRAM - 512MB soldered DDR3 32bit memory - CPLD System Logic - 64MB x16 NOR flash and 4GB x8 NAND flash - 16MB SPI flash Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Singed-off-by: Po Liu <Po.Liu@freescale.com> [yorksun: Fixup include/configs/C29XPCIE.h] Signed-off-by: York Sun <yorksun@freescale.com>