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path: root/include/configs/MPC8323ERDB.h
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2010-09-23Remove unused CONFIG_SERIAL_SOFTWARE_FIFO featureStefan Roese
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO feature from U-Boot. It has only been implemented for PPC4xx and was not used at all. So let's remove it and make the code smaller and cleaner. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
2010-08-09net: rename "FSL UECx" net interfaces "UECx"Kim Phillips
continuation of commit 2ecc2262d66a286e3aac79005bcb5f461312dea8 "net ppc: fix ethernet device names with spaces" (currently in u-boot-net.git) for QE based parts. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-04-22mpc83xx: turn on icache in core initialization to improve u-boot boot timeKim Phillips
before, MPC8349ITX boots u-boot in 4.3sec: column1 is elapsed time since first message column2 is elapsed time since previous message column3 is the message 0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX 0.000 0.000: 0.000 0.000: Reset Status: 0.000 0.000: 0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.032 0.000: Board: Freescale MPC8349E-mITX 0.032 0.000: UPMA: Configured for compact flash 0.032 0.000: I2C: ready 0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 1.516 1.456: FLASH: 16 MB 2.641 1.125: PCI: Bus Dev VenId DevId Class Int 2.652 0.011: 00 10 1095 3114 0180 00 2.652 0.000: PCI: Bus Dev VenId DevId Class Int 2.652 0.000: In: serial 2.652 0.000: Out: serial 2.652 0.000: Err: serial 2.682 0.030: Board revision: 1.0 (PCF8475A) 3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic 3.080 0.000: TSEC0, TSEC1 4.300 1.219: IDE: Bus 0: .** Timeout ** after, MPC8349ITX boots u-boot in 3.0sec: 0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX 0.010 0.000: 0.010 0.000: Reset Status: 0.010 0.000: 0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.017 0.000: Board: Freescale MPC8349E-mITX 0.038 0.020: UPMA: Configured for compact flash 0.038 0.000: I2C: ready 0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 0.260 0.222: FLASH: 16 MB 1.390 1.130: PCI: Bus Dev VenId DevId Class Int 1.390 0.000: 00 10 1095 3114 0180 00 1.390 0.000: PCI: Bus Dev VenId DevId Class Int 1.400 0.010: In: serial 1.400 0.000: Out: serial 1.400 0.000: Err: serial 1.400 0.000: Board revision: 1.0 (PCF8475A) 1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic 1.832 0.000: TSEC0, TSEC1 3.038 1.205: IDE: Bus 0: .** Timeout ** also tested on these boards (albeit with a less accurate boottime measurement method): seconds: before after 8349MDS ~2.6 ~2.2 8360MDS ~2.8 ~2.6 8313RDB ~2.5 ~2.3 #nand boot 837xRDB ~3.1 ~2.3 also tested on an 8323ERDB. v2: also remove the delayed icache enablement assumption in arch ppc's board.c, and add a CONFIG_MPC83xx define in the ITX config file for consistency (even though it was already being defined in 83xx' config.mk). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-04-22mpc83xx: enable command line autocompletionKim Phillips
because it's convenient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-02-22mpc83xx: remove hardcoded network addresses from config filesKim Phillips
and avoid e.g., two identical boards from causing random networking conflicts when hooked up to the same network. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-3183xx, uec: split enet_interface in two variablesHeiko Schocher
There's no sensible reason to unite speed and interface type into one variable. So split this variable enet_interface into two vars: enet_interface_type, which hold the interface type and speed. Also: add the possibility for switching between 10 and 100 MBit interfaces on the fly, when running in FAST_ETH mode. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-09-26mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfieldsKim Phillips
some LCRR bits are not documented throughout the 83xx family RMs. New board porters copying similar board configurations might omit setting e.g., DBYP since it was not documented in their SoC's RM. Prevent them bricking their board by retaining power on reset values in bit fields that the board porter doesn't explicitly configure via CONFIG_SYS_<registername>_<bitfield> assignments in the board config file. also move LCRR assignment to cpu_init_r[am] to help ensure no transactions are being executed via the local bus while CLKDIV is being modified. also start to use i/o accessors. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21mpc83xx: accommodate larger kernel sizes by defaultKim Phillips
linux mpc83xx_defconfig kernels are getting bigger, accommodate for their growth by adjusting default load and fdt addresses. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove ↵Kim Phillips
the former Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-14mpc83xx: increase MONITOR_LEN to offset growing painsKim Phillips
Saving the environment leads to overwriting u-boot itself, bricking boards. Increase u-boot's image size so the environment base address doesn't end up overlapping u-boot text. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-1283xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]xPeter Tyser
Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-1283xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xxPeter Tyser
Use the standard lowercase "xx" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-3083xx: Use common LSDMR defines from asm/fsl_lbc.hKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-18rename CONFIG_CMD_ENV to CONFIG_CMD_SAVEENVMike Frysinger
The CONFIG_CMD_ENV option controls enablement of the `saveenv` command rather than a generic "env" command, or anything else related to the environment. So, let's make sure the define is named accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-14Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE referencesPeter Tyser
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-09-24mpc83xx: don't disable autobootKim Phillips
bootdelay set to -1 'permanently' disables autobooting, even if bootcmd is specified. Change to a positive value to allow autobooting when a bootcmd is set. Reported-by: Coray Tate <Coray.Tate@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-24mpc83xx: add h/w flash protection to board configsKim Phillips
the operating system may leave flash in a h/w locked state after writing. This allows u-boot to continue to write flash by enabling h/w unlocking by default. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-10rename CFG_ENV macros to CONFIG_ENVJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASHJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10rename CFG_ENV_IS_NOWHERE in CONFIG_ENV_IS_NOWHEREJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13drivers/mtd: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD
rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-06-03PPC: Create and use CONFIG_HIGH_BATSBecky Bruce
Change all code that conditionally operates on high bat registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS instead of the myriad ways this is done now. Define the option for every config for which high bats are supported (and enabled by early boot, on parts where they're not always enabled) Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-04-25mpc83xx: bump loadaddr over fdtaddr to 0x500000Kim Phillips
this seems as a good compromise between human memory, typing, and last but not least, to accommodate for current and future kernel bloat. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Dave Liu <daveliu@freescale.com>
2008-03-28mpc8323erdb: fix EEPROM page size and get MAC from EEPROMMichael Barkowski
This patch fixes eeprom page size so that you can now write more than 64 bytes at a time. It also makes the board take MAC addresses, if found, from EEPROM. User should place up to 4 addresses at offset 0x7f00, for eth{,1,2,3}addr. Any unused addresses should be zero. This group of four six-byte values should have it's CRC at the end. crc32 and eeprom commands can be used to accomplish this. If CRC fails, MAC addresses come from the environment. If CRC succeeds, the environment is overwritten at startup. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGEMichael Barkowski
Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB controller on the PCI bus in Linux on the MPC8323ERDB. This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's config file. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25mpc8323erdb: remove RTC and add EEPROMMichael Barkowski
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25mpc8323erdb: Improve the system performanceMichael Barkowski
The following changes are based on kernel UCC ethernet performance: 1. Make the CSB bus pipeline depth as 4, and enable the repeat mode 2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT switch to enable this setting. The following changes are based on the App Note AN3369 and verified to improve memory latency using LMbench: 3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0 4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting previously. 5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on Twr=15ns, and this was already the setting in DDR_MODE) 6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on Trp=15ns) 7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on Tras=40ns) 8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on Trcd=15ns) 9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on Trfc=75ns) 10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based on Tfaw=50ns) 11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based on CL=3 and WL=2). Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25mpc8323erdb: use readable DDR config macrosMichael Barkowski
Use available shift/mask macros to define DDR configuration. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-02-12Remove #undef DEBUG from MPC83xx board header filesTimur Tabi
Remove the "#undef DEBUG" line from all Freescale 83xx board header files. The inclusion of this line makes it impossible to enable debug code in other source files, because "#define DEBUG" typically needs to be defined before any header files are included. Signed-off-by: Timur Tabi <timur@freescale.com>
2008-01-16mpc83xx: fix QE ETHPRIMEs to correct 'FSL UEC0' valueKim Phillips
continuation of commit b96c83d4ae475a70ef2635cd0e748174c44c8601 Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10mpc83xx: Remove cache config from config.hDave Liu
clean up the cache config from configs.h of board Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10mpc83xx: add missing CONFIG_HAS_ETH0 definesKim Phillips
the new libfdt code only updates eth0 if CONFIG_HAS_ETH0 is defined; add the define to the missing board configs. Thanks to Emilian Medve for finding this. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08mpc83xx: convert to using do_fixup_*()Kim Phillips
convert to using simpler mpc85xx style fdt update code; streamline by eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm the old school FLAT_TREE code from 83xx (since the sbc8349 was just converted over to using libfdt). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-0883xx: fix CFG_ENV_ADDR and CFG_ENV_SECT_SIZE definitionsTimur Tabi
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the currently-defined 83xx boards. This change guarantees that the environment will be located on the first flash sector after the U-Boot image. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10mpc83xx: add support for the MPC8323E RDBKim Phillips
MPC8323E based board with 64MB fixed SDRAM, 16MB flash, five 10/100 ethernet ports connected via an ICPlus IP175C switch, one PCI slot, and serial. Features not supported in this patch are SD card interface, 2 USB ports, and the two phone ports. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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