Age | Commit message (Collapse) | Author |
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Make use of a device tree on coreboot boards, and set the default
to link.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Invert the polarity of this option to simplify the Makefile logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Gabe Black <gabeblack@chromium.org>
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Enable the io command for x86 on coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The config is current broken. It compiles but does not boot because IDE is
enabled. Remove all IDE options, and enable SCSI instead.
Also add a working boot command and Linux bootargs, and enable command
line editing to make it easier to work with.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This allows u-boot to figure out the partitions of a chrome-os install.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable the display on coreboot, using CFB.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This helps us monitor boot progress and determine where U-Boot dies if
there are any problems.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable this option to support booting a zImage.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Coreboot uses this controller to implement GPIO access.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This option protects the printf() functions from overflow.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We want to support VGA, serial, USB keyboard and the Coreboot memory
console buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Coreboot boards have an LPC TPM connected, so enable this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Now that coreboot doesn't need the start16 code, remove it. We need
to remove the CONFIG_SYS_X86_RESET_VECTOR option from coreboot.h also.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Putting global data on the stack simplifies the init process (and makes it
slightly quicker). During the 'flash' stage of the init sequence, global
data is in the CAR stack. After SDRAM is initialised, global data is copied
from CAR to the SDRAM stack
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable AHCI driver for Intel SATA devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable Coreboot and EXT4 Filesystems on the coreboot board.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Remove any notion of CONFIG_SERIAL_MULTI from board config files.
Since CONFIG_SERIAL_MULTI is now enabled by default, it is useless
to specify this config option in the board config files. Therefore
remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
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CONFIG_NET_MULTI is not used anymore, so remove it from board files.
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
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Add a target for running u-boot as a coreboot payload in boards.cfg, a
board, CPU and a config. This is a skeleton implementation which always
reports the size of memory as 64 MB.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
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