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path: root/include/configs/ls1046a_common.h
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2017-06-05common: arm: freescale: layerscape: Move header files out of common.hSimon Glass
We should not have an arch-specific header file in common.h. Adjust the board files a little so it is not needed, and drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-26Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-05-23armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046AAlison Wang
This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-23armv8: ls1046a: enable PCI command toolHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-05-22Convert CONFIG_CMD_HASH to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_HASH Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Rework slightly, enable on some boards again] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-22Kconfig: Drop CONFIG_CMD_ENVSimon Glass
This option is not used in U-Boot. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-22lib: move hash CONFIG options to KconfigTom Rini
Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support using hardware acceleration.") created entries for CONFIG_SHA1, CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL. However, no defconfig has migrated to it. Complete the move by first adding additional logic to various Kconfig files to select this when required and then use the moveconfig tool. In many cases we can select these because they are required to implement other drivers. We also correct how we include the various hashing algorithms in SPL. This commit was generated as follows (after Kconfig additions): [1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL [2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL Note: We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously because there is dependency between them. Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-17arm: ls1046ardb: Add SD secure boot targetRuchika Gupta
- Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-17armv8: ls1046ardb: SPL size reductionSumit Garg
Using changes in this patch we were able to reduce approx 4k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1046ardb/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep only ddr_init and board_early_init_f funcations in case of SPL build. 3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. 4. Disable MMC driver from bieng compiled in case of SPL NAND build and NAND driver from bieng compiled in case of SPL MMC build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28armv8: fsl-lsch2: Use Chassis-2 streamid definition for ls1046aBharat Bhushan
LS1046A is Chassis-2 type SOC and shares same streamid definition, this patch adds using streamids for LS1046A. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-19Kconfig: Migrate CONFIG_BAUDRATEPhilipp Tomsich
Move this in to Kconfig with a default of 115200. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [trini: Run moveconfig.py, reword commit slightly] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-03-09Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigsTom Rini
In some cases this is absolutely required, so select this for some secure features. This also requires migration of RSA_FREESCALE_EXP Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Saksham Jain <saksham.jain@nxp.freescale.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-31mmc: move CONFIG_GENERIC_MMC to KconfigMasahiro Yamada
Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC. Let's create an entry for "config GENERIC_MMC" with "default MMC", then convert all macro defines in headers to Kconfig. Almost all of the defines will go away. I see only two exceptions: configs/blanche_defconfig configs/sandbox_noblk_defconfig They define CONFIG_GENERIC_MMC, but not CONFIG_MMC. Something might be wrong with these two boards, so should be checked later. Anyway, this is the output of the moveconfig tool. This commit was created as follows: [1] create a config entry in drivers/mmc/Kconfig [2] tools/moveconfig.py -r HEAD GENERIC_MMC [3] manual clean-up of garbage comments in doc/README.* and include/configs/*.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-28disk: convert CONFIG_DOS_PARTITION to KconfigPatrick Delaunay
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2017-01-25Convert CONFIG_BOARD_EARLY_INIT_F to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_BOARD_EARLY_INIT_F Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-25Convert CONFIG_ARCH_EARLY_INIT_R to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_ARCH_EARLY_INIT_R Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-21config: Move CONFIG_BOARD_LATE_INIT to defconfigsJagan Teki
Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-18armv8/fsl-lsch2: refactor the clock system initializationHou Zhiqiang
Up to now, there are 3 kind of SoCs under Layerscape Chassis 2, like LS1043A, LS1046A and LS1012A. But the clocks tree has a lot of differences, for instance, the IP modules have different dividers to derive its clock from Platform PLL. And the core cluster PLL and platform PLL maybe have different reference clocks, such as LS1012A. Another problem is which clock/PLL should be described by sys_info->freq_systembus, it is confused in Layerscape Chissis 2. This patch is to bind the sys_info->freq_systembus to the Platform PLL, and handle the different divider of IP modules separately between different SoCs, and separate reference clocks of core cluster PLL and platform PLL. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-29mmc: complete unfinished move of CONFIG_MMCMasahiro Yamada
Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created a Kconfig entry for this option without any actual moves, then commit 44c798799f66 ("sunxi: Use Kconfig CONFIG_MMC") moved instances only for SUNXI. We generally do not like such partial moves. This kind of work is automated by tools/moveconfig.py, so it is pretty easy to complete this move. I am adding "default ARM || PPC || SANDBOX" (suggested by Tom). This shortens the configs and will ease new board porting. This commit was created as follows: [1] Edit Kconfig (remove the "depends on", add the "default", copy the prompt and help message from Linux) [2] Run 'tools/moveconfig.py -y -s -r HEAD MMC' Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-11-18spl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORSSemen Protsenko
This option isn't used for anything, so get rid of it. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2016-11-18spl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to KconfigSemen Protsenko
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> [trini: Fix sniper and kc1 migration] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-06arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to KconfigYork Sun
Move these options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06arm: Move FSL_LSCH2 FSL_LSCH3 to KconfigYork Sun
Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-26armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046AYork Sun
Move this option to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> CC: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-09-14armv8: ls1046aqds: Add LS1046AQDS board supportShaohui Xie
LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14armv8: ls1046ardb: Add LS1046ARDB board supportMingkai Hu
LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot SATA: * SerDes2 Lane3 to SATA port USB 3.0: one super speed USB 3.0 type A port one Micro-AB port UART: supports two UARTs up to 115200 bps for console Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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