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path: root/include/configs/ls1046aqds.h
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2017-01-21config: Move CONFIG_BOARD_LATE_INIT to defconfigsJagan Teki
Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-18arm: layerscape: Enable UUID & GPT partition for NXP's ARM SoCPrabhakar Kushwaha
Enable UUID and GPT partition support for NXP's ARM based SoCs i.e. LS1012A, LS1021A, LS1043A, LS1046A and LS2080A. Also enable DOS partition for LS1012AFRDM boards. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-21armv8: ls1046aqds: add lpuart supportShaohui Xie
LPUART0 is used by default, and it's using platform clock. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-12Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1021aqds.h include/configs/ls1021atwr.h
2016-10-12common: Add DISPLAY_BOARDINFOLokesh Vutla
Create a Kconfig entry for DISPLAY_BOARDINFO and make it be the default in certain architectures. Migrate all config files. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-12common/Kconfig: Add DISPLAY_CPUINFOLokesh Vutla
Create a Kconfig entry for DISPLAY_CPUINFO and make it be the default in certain architectures. Migrate all config files. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-06arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to KconfigYork Sun
Move these options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-14armv8: ls1046aqds: Add LS1046AQDS board supportShaohui Xie
LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>