summaryrefslogtreecommitdiff
path: root/include/configs/sequoia.h
AgeCommit message (Collapse)Author
2007-06-01Merge with /home/stefan/git/u-boot/bamboo-nandStefan Roese
2007-06-01ppc4xx: Update Sequoia NAND booting support with ECCStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-07[PATCH] ppc4xx: Fix CONFIG_SYS_CLK_FREQ definition in Sequoia config fileJeffrey Mann
A '3' got cut off in the formatting of the last patch to automatically change the clock speed of the system clock on sequoia board. Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-05ppc4xx: Detect if the sysclk on Sequoia is 33 or 33.333 MHzJeffrey Mann
The AMCC Secquoia board has been changed in a new revision from using a 33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD indicates the difference. This patch reads that bit and uses the correct clock speed for the board. This code is backward compatable will all prior boards. All prior boards will be read as 33.000. Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-28Merge some AMCC make targets to keep the top-level Makefile smallerStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24[PATCH] Small Sequoia cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-19[PATCH] Update Sequoia EBC configuration (NOR FLASH)Stefan Roese
As spotted by Matthias Fuchs, the READY input should not be enabled for the NOR FLASH on the Sequoia board. Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-01[PATCH] Remove PCI-PNP configuration from Sequoia/Rainier config fileStefan Roese
When PCI PNP is enabled the pci pnp configuration routine is called which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some problems with some PCI cards. For now disable the PCI PNP configuration. Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-30[PATCH] Update Sequoia (440EPx) config fileStefan Roese
The config file now handles the 2nd target, the Rainier (440GRx) evaluation board better. Additionally the PPC input clock was adjusted to match the correct value of 33.0 MHz. Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-05[PATCH] Add DDR2 optimization code for Sequoia (440EPx) boardStefan Roese
This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27[PATCH] Select NAND embedded environment from board configurationStefan Roese
The current NAND Bootloader setup forces the environment variables to be in line with the bootloader. This change enables the configuration to be made in the board include file instead so that it can be individually enabled. Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-20[PATCH] Update AMCC Sequoia config file to support 64MByte NOR FLASHStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2006-10-20Add board/cpu specific NAND chip select function to 440 NDFCStefan Roese
Based on idea and implementation from Jeff Mann Patch by Stefan Roese, 20 Oct 2006
2006-09-13Add support for AMCC Rainier PPX440GRx eval boardStefan Roese
Patch by Stefan Roese, 13 Sep 2006
2006-09-12Add NAND environment support for PPC440EPx Sequoia NAND boot configStefan Roese
Patch by Stefan Roese, 12 Sep 2006
2006-09-07Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese
- Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
generated by cgit (git 2.34.1) at 2024-12-26 14:46:02 +0000