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2016-11-21arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platformsTom Rini
This moves what was in arch/arm/cpu/armv7/omap-common in to arch/arm/mach-omap2 and moves arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2 as subdirectories. All refernces to the former locations are updated to the current locations. For the logic to decide what our outputs are, consolidate the tests into a single config.mk rather than including 4. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-16Convert CONFIG_SPL_POWER_SUPPORT to KconfigSimon Glass
Move this option to Kconfig and tidy up existing uses. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-06TI: Rework SRAM definitions and maximumsTom Rini
On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary. Tested on OMAP4 Pandaboard, OMAP3 Beagle xM Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
2016-08-26ARM: Move SYS_CACHELINE_SIZE over to KconfigTom Rini
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
2016-04-25include/configs: Whitespace fixupTom Rini
A number of moveconfig.py runs have left a instances of multiple empty lines in a row. Correct this to a single empty line. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-31armv7: add cacheline sizes where missingAlbert ARIBAUD
Some armv7 targets are missing a cache line size declaration. In preparation for "arm: cache: Implement cache range check for v7" patch, add these declarations with the appropriate value for the target's SoC or CPU. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-20ti_omap3_common: Do not define CONFIG_SPL_NAND_SUPPORTLadislav Michl
Symbol is already defined in ti_armv7_common.h which is included via ti_armv7_omap.h Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-21ns16550: move CONFIG_SYS_NS16550 to KconfigThomas Chou
Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-21ns16550: zap CONFIG_NS16550_SERIALThomas Chou
Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers is completed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-11-21ns16550: unify serial_omapThomas Chou
Unify serial_omap, and use the generic binding. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-10-11ti: omap3: config: remove 1 from boolean defineIgor Grinberg
CONFIG_TWL4030_POWER is a boolean define variable. It is either defined or not defined and should not have a value assigned to it. Remove the value. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2015-07-27configs: split ti_armv7_common into a omap generic headerNishanth Menon
TI armv7 based SoCs are based on two architectures - one based on OMAP generation architecture and others based on Keystone architecture. Many of the options are architecture specific, however a lot are common with v7 architecture. So, step 1 will be to move out OMAP specific stuff from ti_armv7_common into a ti_armv7_omap.h header which is then used by all the relevant architecture headers. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Nishanth Menon <nm@ti.com>
2015-03-13ARM: OMAP3: Enable workaround for ARM errata 454179, 430973, 621766Nishanth Menon
Enable the OMAP3 specific errata code for 454179, 430973, 621766 and while at it, remove legacy non-revision checked errata logic. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCsNishanth Menon
This is in preperation of using generic cross OMAP code. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-02-12dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to KconfigSimon Glass
Move this option to Kconfig and update all boards. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-12dm: omap3: Move driver model CONFIGs to KconfigSimon Glass
Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-23dm: omap3: Move to driver model for GPIO and serialSimon Glass
Adjust the configuration for the am33xx boards, including beagleboard, to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com>
2014-08-30omap3: kconfig: move board select menu and common settingsMasahiro Yamada
Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP3 board select menu to omap3/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap3 Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com>
2014-04-17TI:omap3: Convert omap3_beagle to ti_omap3_common.hTom Rini
Convert to using the common config files. This requires a little more flexibility in the common files than we had been using before. Signed-off-by: Tom Rini <trini@ti.com>
2014-04-17TI:armv7: Change Falcon Mode DT load addressTom Rini
In general, we want to load the DT at base+128MB, so that we ahve sufficient room for the kernel and a larger device tree. In the case of OMAP3, use 64MB instead as we have a number of boards with 128MB DDR. Signed-off-by: Tom Rini <trini@ti.com>
2014-01-24TI: OMAP3: Create common config files for TI OMAP3 platforms.Enric Balletbò i Serra
Create a new file, include/configs/ti_omap3_common.h, for everything common to the OMAP3 SoC leaving just the board specific part to board configuration file. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>