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2014-10-06nitrogen6x: config: disable logoEric Nelson
Some users (QNX and Windows CE users in particular) have asked to disable the Penguin shown on the display at boot time. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2014-10-06nitrogen6x: config: allow more bootargs parametersTroy Kisky
Increase the maximum number of arguments allowed by the Hush parser. This prevents errors when users or scripts aren't quoting parameters when setting the "bootargs" variable et al. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06nitrogen6x: config: enable "i2c edid"Eric Nelson
Enable the "i2c edid" command to query data from an attached HDMI monitor. Usage is typically this: U-Boot > i2c dev 1 U-Boot > i2c edid 0x50 ... Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06nitrogen6x: config: add CONFIG_CMD_MEMTESTEric Nelson
Enable the 'mtest' command on Nitrogen6x and SABRE Lite boards. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06nitrogen6x: config: enable USB keyboard supportEric Nelson
Enable the use of USB keyboards on SABRE Lite and Nitrogen6x boards. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06nitrogen6x: config: expose SATA, then MMC over USBEric Nelson
If no boot script was found, expose internal storage over the USB mass storage gadget to allow easy programming. This is especially useful when SD cards are inaccessible or when loading SATA drives. More details are available in this blog post: http://boundarydevices.com/u-boot-usb-mass-storage-gadget/ Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06nitrogen6x: config: add initrd_highEric Nelson
Support RAM disks by setting initrd_high. See commit 7e9603e Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06nitrogen6x: config: use FS_GENERIC load commandKevin Mihelich
Remove the individual attempts to load using ext2 and fat, replace with the generic load command supporting available filesystem types. Signed-off-by: Kevin Mihelich <kevin@archlinuxarm.org>
2014-10-06nitrogen6x: config: allow boot to USB stickDiego Rondini
This patch enables boot to USB storage devices by expanding on the list of boot devices. Because the USB startup currently takes a long time, it places USB at the end of the list of supported devices. You can over-ride the boot order using the bootdevs environment variable. For instance, this will make USB the first (highest priority) device: U-Boot > setenv bootdevs usb mmc sata U-Boot > saveenv Signed-off-by: Diego Rondini <diego.rondini@kynetics.it> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06nitrogen6x: config: add USB Mass Storage (ums) supportEric Nelson
Add support for the USB mass storage to enable access to on-board storage (especially eMMC and SATA). Details at: http://boundarydevices.com/u-boot-usb-mass-storage-gadget/ Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06arm: socfpga: Use CMD_FS_GENERICMarek Vasut
Enable and use the CONFIG_CMD_FS_GENERIC to avoid hard-coding the filesystem type into the environment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: Split SoCFPGA configurationPavel Machek
Split the SoCFPGA configuration into SoC-specific part which is common for all boards (socfpga_cyclone5_common.h) and a board specific part. There is currently only one board, which is the generic SoCFPGA board (socfpga_cyclone5.h), but there are more to come. This is necessary due to various features of the boards, which unfortunatelly cannot be autodetected. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: Clean up SoCFPGA configurationMarek Vasut
Reorganize and cleanup the configuration file for SoCFPGA. There is no functional change after this cleanup. This was necessary, since the file was a wild mess and it was impossible to make sense of it's content, let alone change something without breaking some other thing. This patch puts the contents on par with regular U-Boot standards. Also remove unused preprocessor symbols CONFIG_SINGLE_BOOTOADER and CONFIG_USE_IRQ, which is undefined by default. Finally, do logical reordering of the defines in the file so it's much more readable. The reordering was also necessary for the splitting as the initial one was messy. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: Enable SDMMC boot for SOCFPGA U-BootChin Liang See
Enable the SDMMC boot as default boot for SOCFPGA U-Boot dev kit. Enable the bootz command as zImage is used instead uImage. Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: Enable DWMMC for SOCFPGAChin Liang See
Enable the DesignWare MMC controller driver support for SOCFPGA Cyclone5 dev kit Signed-off-by: Chin Liang See <clsee@altera.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: cache: Enable PL310 L2 cacheMarek Vasut
Enable the PL310 L2 cache controller support for the SoCFPGA. With the cache related issues resolved, this is safe to be done. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: cache: Enable D-CacheMarek Vasut
The code is now fixed to the point where we can safely enable the L1 data cache. Enable the D-Cache and set it as write-alloc. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: cache: Define cacheline sizeMarek Vasut
The Cortex-A9 has 32-byte long L1 cachelines. Define this value. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: timer: Pull the timer reload value from config fileMarek Vasut
The timer reload value is a property of the timer hardware and there is no reason for this to be configurable. Place this into the timer driver just like on the other hardware. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06arm: socfpga: clock: Add code to read clock configurationPavel Machek
Add the entire bulk of code to read out clock configuration from the SoCFPGA CPU registers. This is important for MMC, QSPI and UART drivers as otherwise they cannot determine the frequency of their upstream clock. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> V2: Fixed the L4 MP clock divider and synced the clock code with latest rocketboards codebase (thanks Dinh for pointing this out)
2014-10-06net: Remove unused CONFIG_DW_SEARCH_PHY from configsPavel Machek
Remove this symbol from configs, since it's unused. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Chin Liang See <clsee@altera.com>
2014-10-06imx6: add Bachmann OT1200 boardChristian Gmeiner
This patch adds support for the OT1200 series of devices. Following components are used in u-boot: + ethernet + i2c + emmc + gpio For more details see README. Changes v1 > v2 - make use of enable_cspi_clock(..) - fix usage of OUTPUT_40OHM define - added README Changes v2 > v3 - improve spelling in README - added own copy of mx6q_4x_mt41j128.cfg Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2014-10-06arm: m53evk: Zap superfluous tab in envMarek Vasut
Remove this tab from env, since it's useless, just use spaces. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2014-10-06arm: m28evk: Zap superfluous tab in envMarek Vasut
Remove this tab from env, since it's useless, just use spaces. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2014-10-06mx6sxsabresd: Fix PCI reset and power GPIO assignmentsFabio Estevam
PERST_GPIO and POWER_GPIO are currently swapped. Fix the GPIO assignments as per the board schematics. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-10-06lsxl: convert to generic board and fix typoMichael Walle
Besides converting the LS-XHL and LS-CHLv2 to generic board, fix a typo which accidentally reverted the bootsource to 'hdd' although the default bootsource should be 'legacy'. Cc: Tom Rini <trini@ti.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-06arm: am335x: siemens board use in DFU mode fullspeed onlyHeiko Schocher
Siemens boards are now using DFU in fullspeed only. For this CONFIG_USB_GADGET_DUALSPEED is undefined. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Liu Bin <b-liu@ti.com> Cc: Lukas Stockmann <lukas.stockmann@siemens.com>
2014-10-05ARM: UniPhier: add UniPhier SoC support codeMasahiro Yamada
These are used by Panasonic UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-10-01ARM: sheevaplug: add HUSH parserDrEagle
This patch add HUSH command parser Signed-off-by: Gerald Kerma <drEagle@doukki.net> Changes in v1: - add HUSH command parser Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-01ARM: sheevaplug: redefine MTDPARTSDrEagle
This patch redefine MTDPARTS Signed-off-by: Gerald Kerma <drEagle@doukki.net> Changes in v1: - redefine MTDPARTS Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-01ARM: sheevaplug: add MTD defaultsDrEagle
This patch add MTDIDS and MTDPARTS defaults settings to sheevaplug Signed-off-by: Gerald Kerma <drEagle@doukki.net> Changes in v1: - add MTDIDS and MTDPARTS default to sheevaplug Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-01ARM: sheevaplug: add MVSATA driverDrEagle
This patch add MVSATA driver to sheevaplug Signed-off-by: Gerald Kerma <drEagle@doukki.net> Changes in v1: - add MVSATA driver to sheevaplug - enable ext4 FS support Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-01ARM: sheevaplug: change env locationDrEagle
This patch move the environment offset in sheevaplug. The size of the u-boot binary is become too big. Fix saving environments was result of corrupting the u-boot. Signed-off-by: Gerald Kerma <drEagle@doukki.net> Changes in v2: - patch description Changes in v1: - fix sheevaplug environment offset Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-01wandboard: Select CONFIG_CMD_FUSEFabio Estevam
Select CONFIG_CMD_FUSE so that the fuse API commands can be used. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-09-30imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boardsYe.Li
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-30imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 boardYe.Li
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-29arm: m53evk: Enable FS_GENERICMarek Vasut
Enable the CONFIG_CMD_FS_GENERIC on m53evk to avoid per-fs specific commands and tweak the environment to cater for this new option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2014-09-29arm: m28evk: Enable FS_GENERICMarek Vasut
Enable the CONFIG_CMD_FS_GENERIC on m28evk to avoid per-fs specific commands and tweak the environment to cater for this new option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2014-09-29arm: m53evk: Test if bootscript exists before loading itMarek Vasut
Make sure the boot.scr exists on the card before loading it from the card to avoid annoying message on the console. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2014-09-29arm: m28evk: Test if bootscript exists before loading itMarek Vasut
Make sure the boot.scr exists on the card before loading it from the card to avoid annoying message on the console. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2014-09-29imx: mx6qarm2: Change the mmcroot and mmcpart env valueYe.Li
1. Set the image load partition to the first FAT partition. 2. Set the kernel rootfs partition to the second partition. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-29imx: mx6qarm2: Add the kernel FDT Loading supportYe.Li
To support loading FDT file for kernel, add the fdt address, file and loading script to arm2 board default environment. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-26Merge branch 'for-tom' of git://git.denx.de/u-boot-dmTom Rini
2014-09-26sandbox: config: Enable all SPI flash chipsSimon Glass
Sandbox may as well support everything. This increases the amount of code that is built/tested by sandbox, and also provides access to all the supported SPI flash devices. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-26Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2014-09-26Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2014-09-25board/ls1021aqds: Add DDR4 supportYork Sun
LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
2014-09-25ARMv8/ls2085a: Move u-boot location to make room for RCWYork Sun
When booting with SP, RCW resides at the beginning of IFC NOR flash. Signed-off-by: York Sun <yorksun@freescale.com>
2014-09-25ARMv8/ls2085a: Enable secondary coresYork Sun
Spin table is at the very beginning of boot code. Each core has an individual release address within the spin table, the ft_cpu_setup fn updates the "cpu-release-addr" property of each cpu node with the corresponding release address. Also fix CPU_RELEASE_ADDR to point to secondary_boot_func. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
2014-09-25ARMv8/ls2085a_emu: Enable DP-DDR as standalone memory blockYork Sun
DP-DDR is used for DPAA, separated from main memory pool for general use. It has 32-bit bus width and use a standard DDR4 DIMM (64-bit). Signed-off-by: York Sun <yorksun@freescale.com>