summaryrefslogtreecommitdiff
path: root/include/configs
AgeCommit message (Collapse)Author
2013-07-12mx53loco: Change default environment to cope with OE changesOtavio Salvador
OpenEmbedded has change partitioning layout of generated image so it does not raise warnings during the boot regarding unkown partition being used for U-Boot. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Jason Liu <r64343@freescale.com>
2013-07-12m28evk: add trimffs to nand commandMarek Vasut
this is usefull when writing an UBI image which contains and UBIFS volume (check README.nand and UBI FAQ for more details) Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2013-07-11ARM: tegra: enable LCD panel on VentanaStephen Warren
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11ARM: tegra: enable LCD panel on HarmonyStephen Warren
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-11Tegra: Config: Enable Tegra30/Tegra114 USB functionJim Lin
Add USB EHCI, storage and network support. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-07-10Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-07-05arm:trats: Increase malloc pool size (for DFU ext4 transfers)Łukasz Majewski
Commit: dfu: make data buffer size configurable SHA1: 89a72b2e0e141042c9109185e02d39b2107ffc62 replaced statically allocated buffers with one allocated with memalign. Malloc pool size of 1MiB was too small, since we needed bigger buffer to transfer for example uImage. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-05EXYNOS: Move files from board/samsung to arch/armRajeshwari Shinde
This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-05EXYNOS4210: Configure GPIO for uartRajeshwari Shinde
This patch configures the gpio values for UART on Origen and SMDKV310 using pinmux Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-05EXYNOS: LDS file move to commonRajeshwari Shinde
smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused. It is renamed to exynos-uboot-spl.lds Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-07-01omap: cm_t35: Fix cm_t35 for weak splash_screen_prepareRobert Winkler
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2013-06-28Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-06-28vf610twr: Remove SoC name from U-Boot promptOtavio Salvador
We've been dropping SoC name from U-Boot prompt as it increase complexity for automatic testing and makes line longer for no good reason. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Andy Voltz <andy.voltz@timesys.com>
2013-06-28vf610twr: Add default environment in line with other Freescale boardsOtavio Salvador
This adds a default environment which should be able to support both 3.0.15 from Timesys and upcoming 3.11. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Andy Voltz <andy.voltz@timesys.com>
2013-06-27am335x_evm: Add missing ';' in findfdtTom Rini
In a714321 we add a check at the end of findfdt to make sure we have updated it from undefined and if not, warn the user. This however forgot a ';' on the end of the previous last test. Signed-off-by: Tom Rini <trini@ti.com>
2013-06-26imx: nitrogen6x: Enable filesystem generic commandsRobert Winkler
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
2013-06-26imx: nitrogen6x: Enable raw initrdRobert Winkler
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
2013-06-26imx: nitrogen6x: Enable bootzRobert Winkler
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
2013-06-26imx: nitrogen6x: Enabled data cacheRobert Winkler
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
2013-06-26imx: Add support for the SabreSD shipped with i.MX6DLPierre Aubert
The SabreSD platform is available with i.MX6Q or i.MX6DL. This patch adds the support of the i.MX6DL. The config file and the board directory are renamed to remove the reference to the MX6Q. Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-06-26sandbox: config: Enable FIT signatures with RSASimon Glass
We want to sign and verify images using sandbox, so enable these options. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-26x86: config: Add tracing optionsSimon Glass
Add configs to enable tracing when it is needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-26exynos: config: Add tracing optionsSimon Glass
Add tracing to Exynos5 boards, so that tracing can be enabled when building with 'make FTRACE=1'. We use a 16MB trace buffer. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-26sandbox: Support trace featureSimon Glass
Support tracing on sandbox by adding suitable CONFIG options. To enable it, compile U-Boot with FTRACE=1. The timer functions are marked to skip tracing, since these are called from the tracing code itself, and we want to avoid an infinite loop. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-06-26cros: exynos: enable cros-ec for smdk5250Hung-ying Tyan
This patch initiates cros-ec in board_init() to enable it for smdk5250. This patch depends on the patch in the MMC series that brings in exynos5-dt.c. Refer to http://patchwork.ozlabs.org/patch/240084. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2013-06-26Add support for Wandboard QuadTapani Utriainen
Add support for the Quad version of Wandboard; fix compile warning resulting from having 2G of memory. Signed-off-by: Tapani Utriainen <tapani@technexion.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2013-06-24Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2013-06-24ARM: at91sam9n12: add network support with ksz8851_16mllBo Shen
add network support with ksz8851_16mll on at91sam9n12ek board Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-06-24Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini
2013-06-24ac14xx: rephrase network boot config for developmentGerhard Sittig
- remove the builtin 'rootpath' spec (according to U-Boot project policy) and require user provided environments to contain these - rephrase the evaluation of the 'muster_nr' approach which allows to quickly switch among several network boot setups (make the setting transparent when empty, resulting in default DULG behaviour) - reduce the ARP timeout for faster network boot Signed-off-by: Gerhard Sittig <gsi@denx.de>
2013-06-24ac14xx: use the official product name everywhereGerhard Sittig
remove remaining "k6" code names, switch to the official 'ac14xx' name Signed-off-by: Gerhard Sittig <gsi@denx.de>
2013-06-24ac14xx: remove obsolete board config itemsGerhard Sittig
- use the default baudrate table for serial communication - remove hostname/boofile/rootpath defines which were not referenced elsewhere Signed-off-by: Gerhard Sittig <gsi@denx.de>
2013-06-24ac14xx: cleanup comments in the board supportGerhard Sittig
fix typos, minor rephrasing, remove obsolete notes and TODO items Signed-off-by: Gerhard Sittig <gsi@denx.de>
2013-06-24CONFIG: EXYNOS5: Enable silent consoleRajeshwari Shinde
This patch enables CONFIG_SILENT_CONSOLE for EXYNOS5. This patch also removes the hardcoding of UART port from exynos5250 config. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-06-22pxa: add support for palmtreo680 boardMike Dunn
This patch adds support for the Palm Treo 680 smartphone. A quick overview of u-boot implementation on the treo 680... The treo 680 has a Diskonchip G4 nand flash chip. This device has a 2k region that maps to the system bus at the reset vector in a NOR-like fashion so that it can be used as the boot device. The phone is shipped with this 2k region configured as write-protected (can't be modified) and programmed with an initial program loader (IPL). At power-up, this IPL loads the contents of two flash blocks to SDRAM and jumps to it. The capacity of the two blocks is not large enough to hold all of u-boot, so a u-boot SPL is used. To conserve flash space, these two blocks and the necessary number of subsequent blocks are programmed with a concatenated spl + u-boot image. That way, the IPL will also load a portion of u-boot proper, and when the spl runs, it relocates the portion of u-boot that the IPL has already loaded, and then resumes loading the remaining part of u-boot before jumping to it. The default_environment is used (CONFIG_ENV_IS_NOWHERE) because I didn't think that having a writable environment was worth the cost of a flash block, although adding it would be straightforward. I abuse the CONFIG_EXTRA_ENV_SETTINGS option to specify the usbtty for the console (CONFIG_SYS_CONSOLE_IS_IN_ENV). Support for the LCD is included, but currently it is only useful for displaying the u-boot splash screen. But if u-boot is built without the usbtty console, it does display the auto-boot progress nicely. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2013-06-22Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2013-06-20powerpc/85xx: Add P1023RDB board supportChunhe Lan
P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPLYing Zhang
There will need the environment in SPL for reasons other than network support (in particular, hwconfig contains info for how to set up DDR). Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT for environment in common/Makefile. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/b4860qds: Relax NOR flash teadc timing parameterPrabhakar Kushwaha
Relax parameters to give address latching more time to setup. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20powerpc/t4qds: Slave module for boot from SRIO and PCIELiu Gang
When a T4 board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boot location to one PCIE or SRIO interface by RCW. 3. Set a specific TLB entry for the boot process. 4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot. 5. Set a specific TLB entry in order to fetch ucode and ENV from master. 6. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 7. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. For more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20powerpc/t4qds: Enable master module for Boot from SRIO and PCIELiu Gang
T4 can support the feature of Boot from SRIO/PCIE, and the macro "CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature when building the u-boot image. You can get some description about this macro in README file, and for more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20powerpc/b4860qds: Slave module for boot from SRIO and PCIELiu Gang
When a b4860qds board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boot location to one PCIE or SRIO interface by RCW. 3. Set a specific TLB entry for the boot process. 4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot. 5. Set a specific TLB entry in order to fetch ucode and ENV from master. 6. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 7. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. For more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20powerpc/b4860qds: Enable master module for boot from SRIO and PCIELiu Gang
B4860QDS can support the feature of Boot from SRIO/PCIE, and the macro "CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature when building the u-boot image. You can get some description about this macro in README file, and for more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20powerpc/boot: Change the macro of Boot from SRIO and PCIE master moduleLiu Gang
Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable the master module of Boot from SRIO and PCIE on a platform. But this is not a silicon feature, it's just a specific booting mode based on the SRIO and PCIE interfaces. So it's inappropriate to put the macro into the file arch/powerpc/include/asm/config_mpc85xx.h. Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to "CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros in configuration header file of each board which can support the master module of Boot from SRIO and PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb: Update default boot environment settingsPriyanka Jain
BSC9131RDB has 1GB DDR. Out of this, only 880MB is passed on to Linux via bootm_size. Remaining -16MB is reserved for PowerPC-DSP shared control area -128MB is reserved for DSP private area. Also 256MB, out of this 880MB is required for data communication between PowerPC and DSP core. For this bootargs are modified to pass parameter to create 1 hugetlb page of 256MB via default_hugepagesz, hugepagesz and hugepages Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb: Add DSP side tlb and lawsPriyanka Jain
BSC9131RDB is a Freescale Reference Design Board for BSC9131 SoC which is a integrated device that contains one powerpc e500v2 core and one DSP starcore. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 memory Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb: Add targets for Sysclk 100MHzPriyanka Jain
BSC9131RDB supports Sysclk -66MHz if jumper J16 is close (default state) -100MHz if jumper J16 is open Add targets -BSC9131RDB_NAND_SYSCLK100 : for NAND boot at Sysclk 100MHz -BSC9131RDB_SPIFLASH_SYSCLK100: for SPI boot at Sysclk 100MHz Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9132qds:Add NAND boot support using new SPL formatPrabhakar Kushwaha
- Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB, LAW entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/bsc9131rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha
- Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-06-20board/p1010rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha
- defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot - remove nand_spl support for P1010RDB Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit (git 2.34.1) at 2024-12-29 17:08:41 +0000