| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-10-01 | rockchip: clk: Add rv1108 SARADC clock support | David Wu | |
| The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). SARADC integer divider control register is 10-bits width. Signed-off-by: David Wu <david.wu@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | |||
| 2017-06-07 | rockchip: clk: Add rv1108 clock driver | Andy Yan | |
| Add clock driver support for Rockchip rv1108 soc Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> | |||
 |
index : uboot-2021-rebase.git | |
| uboot 2021 rebase, to fix booting on modern SD cards, from https://github.com/fifteenhex/u-boot/tree/am335x_som_revival | git repository hosting |
| summaryrefslogtreecommitdiff |