Age | Commit message (Collapse) | Author |
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- add CONFIG_SYS_GENERIC_BOARD
- remove CONFIG_OF_CONTROL to boot again
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
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cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Simon Glass <sjg@chromium.org>
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There is a spelling mistake and two functions are missing comments
altogether. Also the flags declaration is correct, but doesn't follow
style. Finally, the uclass_get_device() function has some errors in
its documentation.
Fix these problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
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Enable driver model for Tegra boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
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These files are taken from Linux 3.14.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
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In a very few cases we need to adjust the driver model root device, such as
when setting it up at initialisation. Add a macro to make this easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is best to avoid having any occurence of 'struct device' in driver
model, so rename to achieve this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Support the iotrace feature for sandbox, and enable it, using some dummy
I/O access methods.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When debugging drivers it is useful to see what I/O accesses were done
and in what order.
Even if the individual accesses are of little interest it can be useful to
verify that the access pattern is consistent each time an operation is
performed. In this case a checksum can be used to characterise the operation
of a driver. The checksum can be compared across different runs of the
operation to verify that the driver is working properly.
In particular, when performing major refactoring of the driver, where the
access pattern should not change, the checksum provides assurance that the
refactoring work has not broken the driver.
Add an I/O tracing feature and associated commands to provide this facility.
It works by sneaking into the io.h heder for an architecture and redirecting
I/O accesses through its tracing mechanism.
For now no commands are provided to examine the trace buffer. The format is
fairly simple, so 'md' is a reasonable substitute.
Note: The checksum feature is only useful for I/O regions where the contents
do not change outside of software control. Where this is not suitable you can
fall back to manually comparing the addresses. It might be useful to enhance
tracing to only checksum the accesses and not the data read/written.
Signed-off-by: Simon Glass <sjg@chromium.org>
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commit 18b06652cd "tools: include u-boot version of sha256.h"
unconditionally forced the sha256.h from u-boot to be used
for tools instead of the host version. This is fragile though
as it will also include the host version. Therefore move it
to include/u-boot to join u-boot/md5.h etc which were renamed
for the same reason.
cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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At present this tool only checks the configuration signing. Have it also
look at each of the images in the configuration and confirm that they
verify.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de> (v1)
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This is not necessary and prevents using this header when building tools.
Signed-off-by: Simon Glass <sjg@chromium.org>
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A small change allows this to operate on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This can be obtained by looking up the image type, so is redundant. It is
better to centralise this lookup to avoid errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This file has code in three different categories:
- Command processing
- OS-specific boot code
- Locating images and setting up to boot
Only the first category really belongs in a file called cmd_bootm.c.
Leave the command processing code where it is. Split out the OS-specific
boot code into bootm_os.c. Split out the other code into bootm.c
Header files and extern declarations are tidied but otherwise no code
changes are made, to make it easier to review.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This type is more readily available on the host compiler, so use it instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We don't make use of the device tree otherwise yet (and will need to
think how to not break the current multi-board support) and this causes
further breakage with additional changes.
Signed-off-by: Tom Rini <trini@ti.com>
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After all, we have realized "force" argument is completely
useless. fdt_chosen() was always called with force = 1.
We should always want to do the same thing
(set appropriate value to the property)
even if the property already exists.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
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After all, we have realized "force" argument is completely
useless. fdt_initrd() was always called with force = 1.
We should always want to do the same thing
(set appropriate value to the property)
even if the property already exists.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
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This is a MIME GnuPG-signed message. If you see this text, it means that
your E-mail or Usenet software does not support MIME signed messages.
The Internet standard for MIME PGP messages, RFC 2015, was published in 1996.
To open this message correctly you will need to install E-mail or Usenet
software that supports modern Internet standards.
Revert changes in iocon.h config file caused by
these two commits:
"configs: iocom: Fix typo on CMD_FPGA command"
(sha1: d0db28f94034ef02c1d6737895766fb3c19de47f)
and
"fpga: Guard the LOADMK functionality with CMD_FPGA_LOADMK"
(sha1: 64e809afeaf1572c3246a5bca198a77d0498fd89)
CONFIG_CMD_FPGAD is own command.
Reported-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable CONFIG_SYS_GENERIC_BOARD for the Ethernut 5 board.
Signed-off-by: Tim Schendekehl <tim.schendekehl@egnite.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Simon Glass <sjg@chromium.org>
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run_command() returns 0 on success and 1 on error. However, there are some
invocations which expect 0 or 1 for success (not repeatable or repeatable)
and -1 for error; add run_command_repeatable() for this purpose.
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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Enable verified boot functionality for a new am335x_boneblack_vboot target.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable booting a FIT containing a kernel/device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add support for device tree control and add device tree files for the
beaglebone black initially.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The current size of 1MB is not enough use to use DFU. Increase it for
ARMv7 boards, all of which should have 32MB or more SDRAM.
With this change it is possible to do 'dfu mmc 0' on a Beaglebone Black.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When writing values into an FDT it is possible that there will be
insufficient space. If the caller gets a useful error then it can
potentially deal with the situation.
Adjust these functions to return -ENOSPC when the FDT is full.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This function is useful for displaying a hash value, so export it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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convert to generic board
Signed-off-by: Steve Rae <srae@broadcom.com>
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Add QSPI support for VF610TWR, such as clock and iomux.
Signed-off-by: Alison Wang <Huan.Wang@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
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This family is supported by the TPS65218 PMIC. Implement a scale_vcores
to set the MPU and CORE voltage correctly to the max frequency that is
supported (and what we will be scaling them to in setup_dplls()).
Signed-off-by: Tom Rini <trini@ti.com>
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Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and
may be used by TI AM335x SoCs.
Signed-off-by: Tom Rini <trini@ti.com>
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in almost all cases we need the i2c commands within the u-boot shell.
So we enable them within the common section.
Cc: trini@ti.com
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
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Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
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loadbootenv expects devtype variable to be set. This is missing in
mmcboot command. With this the following error comes:
U-Boot# run mmcboot
mmc0 is current device
SD/MMC found on device 0
** Bad device usb 0 **
** Bad device usb 0 **
Fixing this by setting devtype as mmc.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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commit a0a37183bd7 "ARM: omap: merge GPMC initialization code for
all platform" needs CONFIG_NOR, CONFIG_NAND or CONFIG_CMD_ONENAND
to be set to access flash. Add CONFIG_NAND for tam3517 derived
boards to prevent the following error: "nand: error: Unable to
find NAND settings in GPMC Configuration - quitting"
cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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Enable support of nand ecclayout command.
Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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Currently PWREMU_MGMT is not configured in the Linux generic UART
driver as this register seems to be specific TI UART IP. So this
needs to be enabled in u-boot to use UART1 from kernel space.
Acked-By: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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With the changes to the i2c framework (and adopting the omap24xx_i2c
driver to them) we can no longer call i2c functions prior to gd having
been set and cleared. When SPL booting, this is handled by setting gd
to point to SRAM in s_init. However in the cases where we are loaded
directly by ROM (memory mapped NOR or QSPI) we need to make use of the
normal hooks to slightly delay these calls.
Signed-off-by: Tom Rini <trini@ti.com>
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The ePOS EVM and EVM SK have QSPI as an option to boot. Add a qspiboot
target that utilizes QSPI for env and so forth as an example of best
practices. As QSPI is booted from directly we need to chang
CONFIG_SYS_TEXT_BASE.
Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices
we need to handle that elsewhere, once NAND support is also added.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
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This patch add support for BCH16_ECC to omap_gpmc driver.
*need to BCH16 ECC scheme*
With newer SLC Flash technologies and MLC NAND, and large densities, pagesizes
Flash devices have become more suspectible to bit-flips. Thus stronger
ECC schemes are required for protecting the data.
But stronger ECC schemes have come with larger-sized ECC syndromes which require
more space in OOB/Spare. This puts constrains like;
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page >= 26 * (page-size / 512)
Signed-off-by: Pekon Gupta <pekon@ti.com>
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GPMC can support simultaneous processing of 8 512Byte data chunks, in parallel
Signed-off-by: Pekon Gupta <pekon@ti.com>
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GPMC_NAND_ECC_LP_x16_LAYOUT
OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.
Signed-off-by: Pekon Gupta <pekon@ti.com>
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