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2015-12-06Merge git://git.denx.de/u-boot-usbTom Rini
2015-12-07arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese
The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
2015-12-07usb: xhci: zynqmp: Removing unused function usb_phy_resetMarek Vasut
This patch removes unsued function usb_phy_reset, rather common function dwc3_phy_reset is used. Signed-off-by: Marek Vasut <marex@denx.de>
2015-12-07drivers:usb:fsl: Add T4080 as affected soc for Erratum A007792 sw workaroundRajesh Bhagat
Apply Erratum A007792 sw workaround for T4080 Signed-off-by: Sriram Dash <sriram.dash@freescale.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-12-07usb: zynqmp: Enable USB XHCI supportSiva Durga Prasad Paladugu
Enable USB XHCI support for ZynqMP Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-12-07usb: zynqmp: Add XHCI driver supportSiva Durga Prasad Paladugu
Added USB XHCI driver support for zynqmp. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-12-05eeprom: Zap CONFIG_SYS_I2C_MULTI_EEPROMSMarek Vasut
This symbol is no longer used anywhere, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Acked-by: Heiko Schocher <hs@denx.de>
2015-12-05Fix typo: commmand -> command.Vagrant Cascadian
Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-12-04Merge branch 'master' of http://git.denx.de/u-boot-sparcTom Rini
2015-12-04Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2015-12-03sparc: Add CONFIG_DISPLAY_BOARDINFO variable to all LEON boardsFrancois Retief
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon2: Updates for generic board initializationFrancois Retief
Reworked the LEON2 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON2 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: leon3: Updates for generic board initializationFrancois Retief
Reworked the LEON3 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON3 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-03sparc: Move SYS_SPARC_NWINDOWS to KconfigFrancois Retief
Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
2015-12-01iocon: Disable FIT_VERBOSETom Rini
In order to fit into image constraints again, remove this feature. Signed-off-by: Tom Rini <trini@konsulko.com>
2015-12-01arm: imx6: novena: Enable extfs support in SPLMarek Vasut
Simple patch to enable support for extfs filesystem in SPL, this is useful to those who want to avoid vfat like plague. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
2015-12-01rockchip: move SYS_MALLOC_SIMPLE to mach-rockchip KconfigAriel D'Alessandro
Commit 1eb0c03c2198a7ec9de456b83dacdc4831b96cbf added SPL_SYS_MALLOC_SIMPLE Kconfig option and changed the way it is evaluated. Thus, the definitions of CONFIG_SYS_MALLOC_SIMPLE in rk3***_common.h board configs are now incorrect because CONFIG_SPL_BUILD is enabled so CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) will look for SPL_SYS_MALLOC_SIMPLE instead of SYS_MALLOC_SIMPLE. This commit fix this enabling SPL_SYS_MALLOC_SIMPLE with the new Kconfig option by default in rockchip-mach. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: Add basic support for evb-rk3036 boardhuang lin
This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc) Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Moved board Kconfig fragment from previous patch into this one to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - moved board Kconfig fragment from previous patch into this one
2015-12-01rockchip: rk3036: Add core Soc start-up codehuang lin
rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
2015-12-01mmc: dw_mmc: support fifo mode in dwc mmc driverhuang lin
some soc(rk3036 etc) use dw_mmc but do not have internal dma, so we implement fifo mode to read and write data. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: Bring in RK3036 device tree file includes and bindingshuang lin
Since rk3036 device tree file still in reviewing, bring it from https://patchwork.kernel.org/patch/7203371/ and add some aliases we need in uboot Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: add config decide whether to build common.chuang lin
some rockchips soc will not use uclass in SPL stage, so define config to decide whether to build common.c Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: add timer driverhuang lin
some rockchip soc will not include lib/timer.c in SPL stage, so implement timer driver for some soc can use us delay function in SPL. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: firefly: Save the environment on SD cardSjoerd Simons
Save the environment on the SD card for Firefly in the empty space between the SPL and the u-boot image. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: Also load the initrd below 512MSjoerd Simons
Similar to load an fdt, when loading an initrd about the 512Mb mark things seem to break. For now force loading below 512Mb until the reason why this fails has been determined/solved. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01dm: pci: Disable PCI compatibility functions by defaultSimon Glass
We eventually need to drop the compatibility functions for driver model. As a first step, create a configuration option to enable them and hide them when the option is disabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-12-01dm: pci: Convert 'pci' command to driver modelSimon Glass
Adjust this command to use the correct PCI functions, instead of the compatibility layer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-12-01dm: pci: Add a comment about how to find struct pci_controllerSimon Glass
With driver mode, struct pci_controller is stored as uclass-private data. Add a comment to that effect. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-12-01dm: tegra: pci: Convert tegra boards to driver model for PCISimon Glass
Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
2015-12-01dm: pci: Add a function to find the regions for a PCI busSimon Glass
This function looks up the controller and returns a pointer to each region type. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2015-12-01dm: pci: Add a function to get the controller for a busSimon Glass
A PCI bus may be a bridge device where the controller is the bridge's parent. Add a function to return the controller device, given a PCI device. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2015-12-01dm: pci: Add functions to emulate 8- and 16-bit accessSimon Glass
Provide a few functions to support using 32-bit access to emulate 8- and 16-bit access. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
2015-12-01dm: pci: Avoid a driver model build error with CONFIG_CMD_PCI_ENUMSimon Glass
This is not supported with driver model, so print a message instead of generating a build error. Rescanning PCI is not yet implemented. This function will be implemented later once some additional PCI driver model improvements are merged. It was confirmed on the mailing list that no one on the tegra side will miss this feature, so it is disabled for tegra. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
2015-12-01dm: tegra: pci: Move CONFIG_PCI_TEGRA to KconfigSimon Glass
Move this option to Kconfig and fix up all users. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
2015-12-01x86: tsc: Move tsc_timer.c to drivers/timerBin Meng
To group all dm timer drivers together, move tsc timer to drivers/timer directory. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01dm: timer: Support 64-bit counterBin Meng
There are timers with a 64-bit counter value but current timer uclass driver assumes a 32-bit one. Modify timer_get_count() to ask timer driver to always return a 64-bit counter value, and provide an inline helper function timer_conv_64() to handle the 32-bit/64-bit conversion automatically. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2015-12-01dm: timer: Fix several nitsBin Meng
This changes 'Timer' to 'timer' at several places. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-30Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2015-11-30arm: atmel: Add SAMA5D2 Xplained boardWenyou Yang
The board supports following features: - Boot media support: SD card/e.MMC/SPI flash, - Support LCD display (optional, disabled by default), - Support ethernet, - Support USB mass storage. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> [fix checkpatch warnings] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-30Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2015-11-30armv8: ls2080a: Define CONFIG_ENV_OVERWRITE to overwrite serial and ethaddrAlison Wang
As the environment variables "serial#" and "ethaddr" need to be overwriten by the users, CONFIG_ENV_OVERWRITE is defined to disable the write protection. Anybody can change or delete these parameters. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30arm: ls102xa: Update fdt_high and initrd_high for LS1021AQDS boardAlison Wang
As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel fails to access the device tree blob on boot. The reason is that u-boot relocates the device tree blob into high memory when booting the kernel and the kernel is unable to access the blob. To avoid this issue, fdt_high is set to the value of 0xffffffff. The device tree blob will not get relocated and is still in low memory to make it accessible to the kernel. For the same reason, initrd_high is set to the value of 0xffffffff too. This patch is to update fdt_high and initrd_high for LS1021AQDS board. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3York Sun
Freescale LSCH3 platforms use two DDR controlers interleaving mode out of reset. It can be configured to disable one controller. To support this operation, the driver needs to detect and skip the disabled controller. Signed-off-by: York Sun <yorksun@freescale.com>
2015-11-30armv8/ls1043ardb: add USB supportGong Qianyu
Add support for the third USB controller for LS1043A. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30armv8/ls1043ardb: add DSPI supportGong Qianyu
Use the U-Boot Driver Model. Just enable Freescale DSPI driver and set DSPI related parameters in dts file. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30armv8/ls1043aqds: add LS1043AQDS board supportShaohui Xie
LS1043AQDS Specification: ------------------------- Memory subsystem: * 2GByte DDR4 DIMM * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two RGMII ports * XFI 10G port * SGMII * QSGMII with 4x 1G ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> [York Sun: Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha
Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha
LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30driver: net: ldpaa: Use DPMAC as net devicePrabhakar Kushwaha
As per current implementation of DPAA2 ethernet driver DPNI is used as net device. DPNI is tangible objects can be multiple connected to same physical lane. Use DPMAC as net device where it represents physical lane. Below modification done in driver - Use global DPNI object - Connect DPMAC to DPNI - Create and destroy DPMAC Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30driver: net: fsl-mc: Create DPAA2 object at run-timePrabhakar Kushwaha
Freescale's DPAA2 ethernet driver depends upon the static DPL for the DPRC, DPNI, DPBP, DPIO objects. Instead of static objects, Create DPNI, DPBP, DPIO objects at run-time. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>