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2015-08-08arm: socfpga: config: Make CONFIG_SPI_FLASH_MTD usefulMarek Vasut
Enable the mtdparts command and related options to make support for SPI NOR MTD useful in any way. With the mtdparts command in place, it is possible to use partition of the SPI NOR in U-Boot. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: config: Fix LOADADDRMarek Vasut
Setting LOADADDR to 0x8000 is a bad idea, it is very likely that some kind of overlap will happen. Move the LOADADDR 0x01000000 (16MiB from start of RAM) to make sure no overlap happens when loading kernel for example. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: config: Enable CONFIG_SPI_FLASH_BARMarek Vasut
This is needed to access broken (read: Micron) SPI flashes which are larger than 16 MiB and don't correctly support 4-byte addressing. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: config: Exclude CONFIG_SPI_FLASH_MTD from SPL buildMarek Vasut
We do not need full MTD support in the SPL build, it only adds size and is not usable in any way. Exclude it. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: config: Zap incorrect config optionsMarek Vasut
There is no need to disable support for partitions in the SPL, we can support partitions in SPL perfectly well. This is likely some remnant from old times, so just remove this configuration option. Moreover, the CRC32 chunk size doesn't have to be adjusted anymore, since both the GD and malloc area are in RAM by the time this CRC check can be used and there's plenty of space. Zap this abomination as well. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: config: Move SPL GD and malloc to RAMMarek Vasut
Now that the SPL structure is organised such that it matches the U-Boot's SPL design, it is possible to use the option of relocating GD to RAM. And since we have GD in RAM, move malloc area to RAM as well. We point the malloc base pointer 1 MiB past U-Boot's load address. We use simple malloc for SPL because it is 3kiB smaller in terms of code size than regular malloc which was used thus far. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: misc: Reset ethernet from OFMarek Vasut
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2015-08-08arm: socfpga: misc: Probe ethernet GMAC from OFMarek Vasut
The GMAC can now be probed from OF, so enable DM ethernet and remove the old ad-hoc designware_initialize() invocation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2015-08-08arm: socfpga: misc: Export bootmode into environment variableMarek Vasut
setenv an environment variable called "bootmode" , which contains the board boot mode. This can be in turn used in scripts to determine from where to load kernel and such. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: spl: Add support for booting from QSPIMarek Vasut
Add code and configuration options to support booting from QSPI NOR. Enable support for booting from QSPI NOR. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: spl: Add support for booting from SD/MMCMarek Vasut
Add code and configuration options to support booting from RAW SD/MMC card as well as for ext4/vfat filesystems. Enable support for booting from SD/MMC card, but don't enable the filesystem support just yet to retain compatibility with old SoCFPGA card format. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: spl: Remove custom linker scriptMarek Vasut
Remove the custom SPL linker script, use the generic one instead. The custom script doesn't bring in anything new and is only burden to maintain. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: spl: Merge spl_board_init() into board_init_f()Marek Vasut
The code in spl_board_init() should have been in board_init_f() from the beginning, since it is code which configures system and then starts DRAM. Thus, it cannot be in spl_board_init(), which is called from board_init_r() , which already expects a working DRAM. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: system: Clean up pinmux_config.cMarek Vasut
Implement new accessor, sysmgr_get_pinmux_table(), used to obtain pinmux table and it's size from the QTS-generated pinmux_config.c. The target here is again to get rid of poluting global namespace by including the pinmux_config.h into it. Furthermore, the pinmux_config.h declares some CONFIG_HPS_* macros, which are explicitly useless to us in U-Boot. Instead, U-Boot does use DT to detect exactly these configuration options. This patch makes sure that while this QTS-generated file can stay in the tree, these obscure macros do not ooze into the namespace anymore. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: scan: Zap iocsr_scan_chain*_table()Marek Vasut
Introduce accessor iocsr_get_config_table() for retrieving IOCSR config tables. This patch is again trimming down the namespace polution. The IOCSR config tables are used only by scan manager, they are generated by qts and are board specific. Before this patch, the approach to use these tables in scan manager was to define an extern variable to silence the compiler and compile board-specific iocsr_config.c into U-Boot which defined those extern variables. Furthermore, since these are tables and the scan manager needs to know the size of those tables, iocsr_config.h is included build-wide. This patch wraps all this into a single accessor which takes the scan chain ID and returns pointer to the table and it's size. All this is wrapped in wrap_iocsr_config.c board-specific file. The file includes the iocsr_config.c (!) to access the original tables and transitively iocsr_config.h . It is thus no longer necessary to include iocsr_config.h build-wide and the namespace polution is trimmed some more. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: clock: Clean up pll_config.hMarek Vasut
Extract the clock configuration horribleness caused by pll_config.h in the following manner. First of all, introduce a few new accessors which return values of various clocks used in clock_manager.c and use them in clock_manager.c . These accessors replace those few macros which came from pll_config.h originally. Also introduce an accessor which returns the struct cm_config default configuration for the clock manager used in SPL. The accessors are implemented in a board-specific wrap_pll_config.c file, whose sole purpose is to include the qts-generated pll_config.h and provide only the necessary values to the clock manager. The purpose of this design is to limit the scope of inclusion for the pll_config.h , which thus far was included build-wide and poluted the namespace. With this change, the inclusion is limited to just the new wrap_pll_config.c file, which in turn provides three simple functions for the clock_manager.c to use. Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: enable the Altera SDRAM controller driverDinh Nguyen
Enable the Altera SDRAM driver for the SoCFPGA platform. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
2015-08-08arm: socfpga: Move generated files into qts subdirMarek Vasut
Move all the files generated by Quartus into the qts/ subdir of the board/altera/socfpga dir to make them explicitly separate from the generic U-Boot code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-06Merge git://git.denx.de/u-boot-dmTom Rini
2015-08-06ARM: tegra: Add p2371-0000 boardStephen Warren
P2371-0000 is a P2581 or P2530 CPU board married to a P2595 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet via USB3, USB3 host port, SATA, a GPIO expansion header, and an analog audio jack. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06ARM: tegra: Add e2220-1170 boardStephen Warren
E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, and sockets for various expansion modules. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06ARM: tegra: p2571: remove another unused defineStephen Warren
CONFIG_MAX77620_POWER isn't used anywhere. Don't define it in p2571.h. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06ARM: tegra: enable GPU DT node when appropriateAlexandre Courbot
T124/210 requires some specific configuration (VPR setup) to be performed by the bootloader before the GPU can be used. For this reason, the GPU node in the device tree is disabled by default. This patch enables the node if U-boot has performed VPR configuration. Boards enabled by this patch are T124's Jetson TK1 and Venice2 and T210's P2571. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06ARM: tegra: move VPR configuration to a later stageAlexandre Courbot
U-boot is responsible for enabling the GPU DT node after all necessary configuration (VPR setup for T124) is performed. In order to be able to check whether this configuration has been performed right before booting the kernel, make it happen during board_init(). Also move VPR configuration into the more generic gpu.c file, which will also host other GPU-related functions, and let boards specify individually whether they need VPR setup or not. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06dm: core: Fix a typo in the uclass_get_device_by_name() commentSimon Glass
This function comment has a typo. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-06dm: core: Add a way to set a device nameSimon Glass
Some devices are bound entirely by probing and do not have the benefit of a device tree to give them a name. This is very common with PCI and USB. In most cases this is fine, but we should add an official way to set a device name. This should be called in the device's bind() method. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-06devres: add debug command to dump device resourcesMasahiro Yamada
This new command can dump all device resources associated to each device. The fields in every line shows: - The address of the resource - The size of the resource - The name of the release function - The stage in which the resource has been acquired (BIND/PROBE) Currently, there is no driver using devres, but if such drivers are implemented, the output of this command should look like this: => dm devres - root_driver - soc - extbus - serial@54006800 bfb541e8 (8 byte) devm_kmalloc_release BIND bfb54440 (4 byte) devm_kmalloc_release PROBE bfb54460 (4 byte) devm_kmalloc_release PROBE - serial@54006900 bfb54270 (8 byte) devm_kmalloc_release BIND - gpio@55000000 - i2c@58780000 bfb5bce8 (12 byte) devm_kmalloc_release PROBE bfb5bd10 (4 byte) devm_kmalloc_release PROBE - eeprom bfb54418 (12 byte) devm_kmalloc_release BIND Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06devres: make Devres optional with CONFIG_DEVRESMasahiro Yamada
Currently, Devres requires additional 16 byte for each allocation, which is not so insignificant in some cases. Add CONFIG_DEVRES to make this framework optional. If the option is disabled, devres functions fall back to non-managed variants. For example, devres_alloc() to kzalloc(), devm_kmalloc() to kmalloc(), etc. Because devres_head is also surrounded by an ifdef conditional, there is no memory overhead when CONFIG_DEVRES is disabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06devres: add devm_kmalloc() and friends (managed memory allocators)Masahiro Yamada
devm_kmalloc() is identical to kmalloc() except that the memory allocated with it is managed and will be automatically released when the device is removed/unbound. Likewise for the other variants. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06devres: introduce Devres (Managed Device Resource) frameworkMasahiro Yamada
In U-Boot's driver model, memory is basically allocated and freed in the core framework. So, low level drivers generally only have to specify the size of needed memory with .priv_auto_alloc_size, .platdata_auto_alloc_size, etc. Nevertheless, some drivers still need to allocate/free memory on their own in case they cannot statically know the necessary memory size. So, I believe it is reasonable enough to port Devres into U-boot. Devres, which originates in Linux, manages device resources for each device and automatically releases them on driver detach. With devres, device resources are guaranteed to be freed whether initialization fails half-way or the device gets detached. The basic idea is totally the same to that of Linux, but I tweaked it a bit so that it fits in U-Boot's driver model. In U-Boot, drivers are activated in two steps: binding and probing. Binding puts a driver and a device together. It is just data manipulation on the system memory, so nothing has happened on the hardware device at this moment. When the device is really used, it is probed. Probing initializes the real hardware device to make it really ready for use. So, the resources acquired during the probing process must be freed when the device is removed. Likewise, what has been allocated in binding should be released when the device is unbound. The struct devres has a member "probe" to remember when the resource was allocated. CONFIG_DEBUG_DEVRES is also supported for easier debugging. If enabled, debug messages are printed each time a resource is allocated/freed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06dm: add DM_FLAG_BOUND flagMasahiro Yamada
Currently, we only have DM_FLAG_ACTIVATED to indicate the device status, but we still cannot know in which stage is in progress, binding or probing. This commit introduces a new flag, DM_FLAG_BOUND, which is set when the device is really bound, and cleared when it is unbound. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06dm: Support address translation for simple-busSimon Glass
The 'ranges' property can be used to specify a translation from the system address to the bus address. Add support for this using the dev_get_addr() function, which devices should use to find their address. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedefYork Sun
fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org>
2015-08-05exynos: Add support for springSimon Glass
Spring is the first ARM-based HP Chromebook 11. It is similar to snow and it uses the same Samsung Exynos5250 chip. But has some unusual features. Mainline support for it has lagged snow (both in kernel and U-Boot). Now that the exynos5 code is common we can support spring just by adding a device tree and a few lines of configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05dts: Drop unused compatible ID for the NXP video bridgeSimon Glass
This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05video: Remove the old parade driverSimon Glass
We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05cros_ec: Remove the old tunnel codeSimon Glass
This is not needed with driver mode. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05power: Remove old TPS65090 driversSimon Glass
Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05exynos: Drop old exynos5250-specific board codeSimon Glass
Now that most exynos5250 boards can use the generic exynos5 code, switch over to it and remove the old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05exynos: Drop old exynos5420-specific board codeSimon Glass
Now that exynos5420 boards can use the generic exynos5 code, switch over to it and remove the old code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05exynos: config: Move common options to the common headers and tidy upSimon Glass
Many options are duplicated on the exynos5 boards. Move these to the common files. Also some options are not used so can be removed. Tidy this up to make the files easier to maintain. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05exynos: Enable new features for exynos5 boardsSimon Glass
Enable PMICs, regulators and the like so that new drivers will be made available. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05dm: video: Add support for video bridgesSimon Glass
A video bridge typically converts video from one format to another, e.g. DisplayPort to LVDS. Add driver model support for these with a simple interface to control activation and backlight. The uclass supports GPIO control of power and reset lines. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05dm: power: Add support for the S5M8767 PMICSimon Glass
This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The driver supports probing and basic register access. It supports the standard device tree binding and supports driver model. A regulator driver can be provided also. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05dm: power: Add a new driver for the TPS65090 PMICSimon Glass
The existing TPS65090 driver does not support driver model. Add a new one that does. This can be used as a base for a regulator driver also. It uses the standard device tree binding. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05cros_ec: Support the LDO access method used by springSimon Glass
Add a driver to support the special LDO access used by spring. This is a custom method in the cros_ec protocol - it does not use an I2C pass-through. There are two implementation choices: 1. Write a special LDO driver which can talk across the EC. Duplicate all the logic from TPS65090 for retrying when the LDO fails to come up. 2. Write a special I2C bus driver which pretends to be a TPS65090 and transfers reads and writes using the LDO message. Either is distasteful. The latter method is chosen since it results in less code duplication and a fairly simple (30-line) implementation of the core logic. The crosec 'ldo' subcommand could be removed (since i2c md/mw will work instead) but is retained as a convenience. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05dm: cros_ec: Convert the I2C tunnel code to use driver modelSimon Glass
The Chrome OS EC supports tunnelling through to an I2C bus on the EC. This currently uses a copy of the I2C command code and a special 'crosec' sub-command. With driver model we can define an I2C bus which tunnels through to the EC, and use the normal 'i2c' command to access it. This simplifies the code and removes some duplication. Add an I2C driver which tunnels through to the EC. Adjust the EC code to support binding child devices so that it can be set up. Adjust the existing I2C xfer function to fit driver model better. For now the old code remains to allow things to still work. It will be removed in a later patch once the new flow is fully enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05dm: i2c: Add support for multiplexed I2C busesSimon Glass
Add a new I2C_MUX uclass. Devices in this class can multiplex between several I2C buses, selecting them one at a time for use by the system. The multiplexing mechanism is left to the driver to decide - it may be controlled by GPIOs, for example. The uclass supports only two methods: select() and deselect(). The current mux state is expected to be stored in the mux itself since it is the only thing that knows how to make things work. The mux can record the current state and then avoid switching unless it is necessary. So select() can be skipped if the mux is already in the correct state. Also deselect() can be made a nop if required. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05dm: i2c: Add a function to transfer messagesSimon Glass
Sometimes it is useful to be able to transfer a raw I2C message. This happens when the chip address needs to be set manually, or when the data to be sent/received is in another buffer. Add a function to provide access to this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
2015-08-05dm: i2c: Move definitions to the top of the header fileSimon Glass
Move the flags and struct definitions higher in the file so that we can reference them with functions declared in the driver model section. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>