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2015-11-02dm: pmic: add s2mps11 PMIC I/O driverPrzemyslaw Marczak
This driver allows I/O operations on the Samsung S2MPS11 PMIC, which provides lots of LDO/BUCK outputs. To enable it, update defconfig with: - CONFIG_PMIC_S2MPS11 and additional, if were not defined: - CONFIG_CMD_PMIC - CONFIG_ERRNO_STR The binding info: doc/device-tree-bindings/pmic/s2mps11.txt Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-01ARM: at91: sama5: change the environment address to 0x6000Josh Wu
As sama5 board has 32k sram size, so the at91bootstrap and spl for sama5 boards is bigger than 16k (0x4000). That will overlap the U-Boot environment. So I move environment to 0x6000. And reduce its size as well. Following shows the size of the spl binaries (v2015.04 vs v2015.07): % ls v2015.04/*spi*spl.bin -l | awk '{print $5,$(NF)}' 15540 v2015.04/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin 15704 v2015.04/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin 16064 v2015.04/sama5d3xek_spiflash_defconfig_u-boot-spl.bin 16304 v2015.04/sama5d4ek_spiflash_defconfig_u-boot-spl.bin 16304 v2015.04/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin % ls v2015.07/*spi*spl.bin -l | awk '{print $5,$(NF)}' 16136 v2015.07/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin 16300 v2015.07/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin 16664 v2015.07/sama5d3xek_spiflash_defconfig_u-boot-spl.bin 16904 v2015.07/sama5d4ek_spiflash_defconfig_u-boot-spl.bin 16904 v2015.07/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin The gcc version is: gcc 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1) Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Bo Shen <voice.shen@gmail.com>
2015-10-30Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2015-10-30ls102xa: Adjust some macros for SD boot on LS1021A QDS boardAlison Wang
As more features are added for SD boot on LS1021A QDS board, the size of U-Boot is larger. CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS needs to be adjusted to a suitable value. Starting address of the malloc pool used in SPL needs to be adjusted too, or it will occupy the address u-boot loads. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-30configs: ls1021atwr: Enable ID EEPROM for SD bootYao Yuan
I2C1 can work on ls102xa rev2.0 SD boot, so add ID EEPROM for SD boot. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-30drivers/ddr/fsl_ddr: Make SR_IE configurableJoakim Tjernlund
SR_IE(Self-refresh interrupt enable) is needed for Hardware Based Self-Refresh. Make it configurable and let board code handle the rest. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2015-10-29net: mdio: Add mdio_free() and mdio_unregister() APIBin Meng
Currently there is no API to uninitialize mdio. Add two APIs for this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: Increase the size of the net_boot_file_name bufferJacob Stiffler
The net_boot_file_name buffer is used as storage for the bootfilename command line argument to network boot commands such as tftp and nfs. Increase the size of this buffer to 1024 bytes as the current size of 128 bytes is restrictive for arbitrary paths on the server. Signed-off-by: Jacob Stiffler <j-stiffler@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29arm: ls102xa: Set fdt_high and initrd_high to the value of 0xffffffffAlison Wang
As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel fails to access the device tree blob on boot. The reason is that u-boot relocates the device tree blob into high memory when booting the kernel and the kernel is unable to access the blob. To avoid this issue, fdt_high is set to the value of 0xffffffff. The device tree blob will not get relocated and is still in low memory to make it accessible to the kernel. For the same reason, initrd_high is set to the value of 0xffffffff too. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043a: Enable secondary coresHou Zhiqiang
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to make secondary cores excute in spin loop. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add sd boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu
This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043a: Add Fman supportShaohui Xie
Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add nand boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add LS1043ARDB board supportMingkai Hu
LS1043ARDB Specification: ------------------------- Memory subsystem: * 2GByte DDR4 SDRAM (32bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * XFI 10G port * QSGMII with 4x 1G ports * Two RGMII ports PCIe: * PCIe2 (Lanes C) to mini-PCIe slot * PCIe3 (Lanes D) to PCIe slot USB 3.0: two super speed USB 3.0 type A ports UART: supports two UARTs up to 115200 bps for console Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-10-29armv8/fsl_lsch2: Add fsl_lsch2 SoCMingkai Hu
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with ARMv8 cores and 2rd generation of Chassis. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu
There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net/fm: fix MDIO controller base on FMAN2Shaohui Xie
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two FMANs, so we should only define MDIO controller base on FMAN2 when there is FMAN2. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net: Move some header files to include/Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv7/ls1021a: move ns_access to common fileMingkai Hu
Config Security Level Register is different between different SoCs, so put the CSL register definition into the arch specific directory. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29common/board_f.c: change the macro name and remove it for PPC platformsGong Qianyu
For most PPC platforms, they will call the first get_clocks() in init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is then defined to call the second get_clocks(), which should be redundant for PPC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8: ls2085ardb: enable CONFIG_PHY_AQUANTIAShaohui Xie
To support on board Aquantia's PHY AQR405. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29crypto/fsl: SEC driver cleanup for 64 bit and endiannessAneesh Bansal
The SEC driver code has been cleaned up to work for 64 bit physical addresses and systems where endianess of SEC block is different from the Core. Changes: 1. Descriptor created on Core is modified as per SEC block endianness before the job is submitted. 2. The read/write of physical addresses to Job Rings will be depend on endianness of SEC block as 32 bit low and high part of the 64 bit address will vary. 3. The 32 bit low and high part of the 64 bit address in descriptor will vary depending on endianness of SEC. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29Pointers in ESBC header made 32 bitAneesh Bansal
For the Chain of Trust, the esbc_validate command supports 32 bit fields for location of the image. In the header structure definition, these were declared as pointers which made them 64 bit on a 64 bit core. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-28Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
2015-10-28net: change the env name to use constJosh Wu
As we don't modify the 'name' parameter, so change it to const. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-27Merge git://www.denx.de/git/u-boot-ppc4xxTom Rini
2015-10-27Merge git://www.denx.de/git/u-boot-cfi-flashTom Rini
2015-10-27Merge git://git.denx.de/u-boot-dmTom Rini
2015-10-27ocotea: DropTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27taishan: DropTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27ebony: DropTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27taihu: RemoveTom Rini
This board has not compiled for me for quite some time due to size constraints, remove. Cc: John Otken <jotken@softadvances.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27cfi_flash: use specific width types for cwordRyan Harkin
This patch changes the cword union to use specific length types that are architecture indepented. This patch also renames the members of the cword union to represent their usage, i.e.: c -> w8 s -> w16 l -> w32 ll -> w64 Where "w" stands for "width" in bits. I discovered this problem when enabling CFI flash on vexpress64. cword.l was an unsigned long int, but it was intended to be 32 bits wide. Unfortunately, it's 64-bits wide on a 64-bit system, meaning that a 64-bit system fails when attempting to use 32-bit wide CFI flash parts. Similar problems also existed with the other cword sizes. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-26arm: ls1021a: Add QSPI or IFC support in SD bootAlison Wang
As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in SD boot now. For the customer's demand, QSPI needs to be supported in SD boot too. This patch adds QSPI or IFC support in SD boot according to the corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is used to support QSPI in SD boot. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26QE: modify the address of qe ucodeZhao Qiang
The address of uboot changed, so change qe ucode Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26arm/fsl-ls: Add CONFIG_OF_STDOUT_VIA_ALIASScott Wood
This will allow OF-based earlycon to be used once the appropriate aliases are added to the device tree and kernel support is fixed. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26ubi,ubifs: sync with linux v4.2Heiko Schocher
sync with linux v4.2 commit 64291f7db5bd8150a74ad2036f1037e6a0428df2 Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Aug 30 11:34:09 2015 -0700 Linux 4.2 This update is needed, as it turned out, that fastmap was in experimental/broken state in kernel v3.15, which was the last base for U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
2015-10-26linux, compat: add missing definitions for ubiHeiko Schocher
add missing definitions for the ubi/ubifs sync with linux 4.2, also change "#define kfree ..." into a static inline, so prevent ubi compile error: CC drivers/mtd/ubi/fastmap.o drivers/mtd/ubi/fastmap.c: In function 'scan_pool': drivers/mtd/ubi/fastmap.c:475:3: error: called object 'free' is not a function Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-25sf: Add FSR support to spi_flash_cmd_wait_readyJagan Teki
This patch adds flag status register reading support to spi_flash_cmd_wait_ready. Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Stefan Roese <sr@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Tom Rini <trini@konsulko.com> Cc: Hou Zhiqiang <B48286@freescale.com> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25sf: Make flash->flags use for generic usageJagan Teki
Use the flash->flags for generic usage, not only for dm-spi-flash, this will be used for future flag additions. [Correct the spi flash flags detect logic] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25zynq-common: Add SPL SPI offset, size configsSiva Durga Prasad Paladugu
Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL spi mode. These macros defines the device tree offset, size and the kernel image offset in flash respectively. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-25zynq-common: Enable ISSI SPI-NOR flash supportJagan Teki
This patch enabled CONFIG_SPI_FLASH_ISSI for qspi on zynq boards. Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25zynq-common: Enable Bank/Extended address register supportJagan Teki
Enabled SPI flash Bank/Extended address register support. Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing. Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25zynq-common: Enable zynq qspi controller supportJagan Teki
This patch adds support for zynq qspi controller driver on zynq-common.h Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Simon Glass <sjg@chromium.org> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-24common/board_f.c: modify the macro to use get_clocks() more commonGong Qianyu
get_clocks() should not be limited by ESDHC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-10-24arm, powerpc: select SYS_GENERIC_BOARDMasahiro Yamada
We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-24distro_bootcmd: Add support for booting from ubifsRoy Spliet
Under the assumptions of having a UBI volume called boot, containing a ubifs filesystem. Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2015-10-24ubifs: Add generic fs supportHans de Goede
Add generic fs support, so that commands like ls, load and test -e can be used on ubifs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Heiko Schocher <hs@denx.de>
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