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This patch fixes the following compilation warning for maxbcm:
Building maxbcm board...
text data bss dec hex filename
160075 6596 38240 204911 3206f ./u-boot
board/maxbcm/maxbcm.c: In function 'reset_phy':
board/maxbcm/maxbcm.c:68:6: warning: unused variable 'reg' [-Wunused-variable]
u16 reg;
^
board/maxbcm/maxbcm.c:66:6: warning: unused variable 'devadr' [-Wunused-variable]
u16 devadr = CONFIG_PHY_BASE_ADDR;
^
Additionally support Spansion SPI NOR flash is added. With larger SPI device
support via the CONFIG_SPI_FLASH_BAR define.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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This patch adds SPL support to the db-mv784mp-gp eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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This patch adds SPL support to the maxbcm MV78460 based board. Including
the fixed DDR configuratrion needed for the DDR training code. And the
the serdes PHY init code.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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LIBFDT feature is required to support new kernels.
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
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Since commit 0365ffcc0bd6 (generic-board: show model name in
board_init_f() too), the support card information has not been
displayed because check_support_card() is invoked only when
show_board_info() fails to get the model name from Device Tree.
This commit adds misc_init_f() function to call check_support_card()
from there.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Now init functions called from board_postclk_init() and dram_init()
are only necessary for SPL.
Move them to spl_board_init() for clean-up.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Currently, I/O pin settings are not necessary for SPL.
The board_early_init_f() seems a suitable place to call pin_init().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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To boot UniPhier boards with the NAND boot mode, two images
(u-boot-spl.bin and u-boot-dtb.img) must be written at the correct
offset addresses.
TFTP downloading is useful to update such images in the NAND device.
We generally do:
=> nand erase 0 0x100000
=> tftpboot u-boot-spl.bin
=> nand write $loadaddr 0 0x10000
=> tftpboot u-boot-dtb.img
=> nand write $loadaddr 0x10000 0xf0000
It is a tedious and error-prone operation.
This commit provides the shorthand:
=> run nandupdate
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Run the next command only when the previous one succeeded.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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If the BIOS emulator is not available, allow use of native execution if
available, and vice versa. This can be controlled by the caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This board includes a few IDs we have not seen before.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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There is an existing function prototype in the header file but it is not
implemented. Implement something similar.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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It turns out that the device_mode_data is rsb specific, rather then slave
specific, so integrate the rsb_set_device_mode() call into rsb_init().
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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We do not need i2c support in the SPL when there is no PMIC (some sun4i
boards), or when the PMIC is not using i2c such as on sun6i and sun8i.
This reduces the SPL size from (e.g.) 21812 to 19260 bytes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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The Juno Development Platform is a physical Versatile Express
device with some differences from the emulated semihosting
models. The main difference is that the system is split in
a SoC and an FPGA where the SoC hosts the serial ports at
totally different adresses.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The Versatile Express ARMv8 semihosted FVP platform is still
using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure
some compile-time flags. Get rid of this and create a Kconfig
entry for the FVP model, and a selectable bool for the
semihosting library.
The FVP subboard is now modeled as a target choice so we can
eventually choose between different ARMv8 versatile express
boards (FVP, base model, Juno...) this way. All dependent
symbols are updated to reflect this.
The 64bit Versatile Express board symbols are renamed
VEXPRESS64 so we have some chance to see what is actually
going on. Tested on the FVP fast model.
Acked-by: Steve Rae <srae@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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only tested tested under QEMU with vexpress_ca9x4 ("-M vexpress-a9") and
vexpress_ca15_tc2 ("-M vexpress-a15"). Makes the ugly warning go away.
Signed-off-by: Chris Kuethe <chris.kuethe+github@gmail.com>
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Modify $bootcmd_dhcp to read the downloaded script filename from an
environment variable rather than hard-coding it. This allows the user
(or another script) to select a different script name if they want,
without editing the whole value of $bootcmd_dhcp.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Move this driver to use driver model and update the snow configuration to
match.
Signed-off-by: Simon Glass <sjg@chromium.org>
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These functions are useful in case the board calls them. Also fix a missing
parameter caused by applying the wrong patch (actually I failed to send v2
and applied v1 by mistake).
Signed-off-by: Simon Glass <sjg@chromium.org>
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This patch enables CONFIG_DM_I2C and also CONFIG_DM_I2C_COMPAT.
The last one should be removed when all the i2c peripheral
drivers will use dm i2c framework.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
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This patch enables CONFIG_DM_I2C and also CONFIG_DM_I2C_COMPAT.
The last one should be removed when the dm pmic framework will
be finished.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
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This commit enable support for the above driver,
which was disabled in common config.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
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This PMIC is not common for all Exynos5250
based boards, so should be romoved from
common config.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
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There is no MAX77686 pmic on this board,
so the driver support should be removed.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
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Currently the hash functions used in RSA are called directly from the sha1
and sha256 libraries. Change the RSA checksum library to use the progressive
hash API's registered with struct hash_algo. This will allow the checksum
library to use the hardware accelerated progressive hash API's once available.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Fixed build error in am335x_boneblack_vboot due to duplicate CONFIG_DM)
Change-Id: Ic44279432f88d4e8594c6e94feb1cfcae2443a54
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Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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The hash_algo structure has some implementations in which progressive hash
API's are not defined. These are basically the hardware based implementations
of SHA. An API is added to find the algo which has progressive hash API's
defined. This can then be integrated with RSA checksum library which uses
Progressive Hash API's.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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Modify rsa_verify to use the rsa driver of DM library .The tools
will continue to use the same RSA sw library.
CONFIG_RSA is now dependent on CONFIG_DM. All configurations which
enable FIT based signatures have been modified to enable CONFIG_DM
by default.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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For the platforms which use,CONFIG_FIT_SIGNATURE, the required configs are
moved to the platform's defconfig file. Selecting CONFIG_FIT_SIGNATURE using
defconfig automatically resolves the dependencies for signature verification.
The RSA library gets automatically selected and user does not have to define
CONFIG_RSA manually.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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Add a new rsa uclass for performing modular exponentiation and implement
the software driver basing on this uclass.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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Public exponentiation which is required in rsa verify functionality is
tightly integrated with verification code in rsa_verify.c. The patch
splits the file into twp separating the modular exponentiation.
1. rsa-verify.c
- The file parses device tree keys node to fill a keyprop structure.
The keyprop structure can then be converted to implementation specific
format.
(struct rsa_pub_key for sw implementation)
- The parsed device tree node is then passed to a generic rsa_mod_exp
function.
2. rsa-mod-exp.c
Move the software specific functions related to modular exponentiation
from rsa-verify.c to this file.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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this is an atempt to make the export of functions typesafe.
I replaced the jumptable void ** by a struct (jt_funcs) with function pointers.
The EXPORT_FUNC macro now has 3 fixed parameters and one
variadic parameter
The first is the name of the exported function,
the rest of the parameters are used to format a functionpointer
in the jumptable,
the EXPORT_FUNC macros are expanded three times,
1. to declare the members of the struct
2. to initialize the structmember pointers
3. to call the functions in stubs.c
Signed-off-by: Martin Dorwig <dorwig@tetronik.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(resending to the list since my tweaks are not quite trivial)
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This has moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
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These have moved to driver model so we don't need the fdtdec support.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present we go through various contortions to store the I2C's chip
address in its private data. This only exists when the chip is active so
must be set up when it is probed. Until the device is probed we don't
actually record what address it will appear on.
However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the address when the child is bound,
and avoid the messy contortions.
Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.
However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the chip select when the child is bound,
and avoid the messy contortions.
Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some buses need to set up their devices before they can be used. This setup
may well be common to all buses in a particular uclass. Support a common
pre-probe method for the uclass, called before any bus devices are probed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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For buses, after a child is bound, allow the uclass to perform some
processing. This can be used to figure out the address of the child (e.g.
the chip select for SPI slaves) so that it is ready to be probed.
This avoids bus drivers having to repeat the same process, which really
should be done by the uclass, since it is common.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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In many cases the per-child private data for a device's children is defined
by the uclass rather than the individual driver. For example, a SPI bus
needs to store information about each of its children, but all SPI drivers
store the same information. It makes sense to allow the uclass to define
this data.
If the driver provides a size value for its per-child private data, then use
it. Failng that, fall back to that provided by the uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
neither I2C nor SPI use this feature, so drop it.
Some devices need us to look up an alias to number them within the uclass.
Add a flag to control this, so it is not done unless it is needed.
Adjust the tests to test this new behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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