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2020-07-22Merge tag 'u-boot-rockchip-20200722' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - New rk3326 board: Hardkernel Odroid Go2; - Update board config and dts for RockPI 4/N8/N10; - Update led boot on support for roc-rk3399-pc; - Enable SPI Flash suppor for rk3328 rock64 board; - Update rockchip pcie phy to use generic framework;
2020-07-22rockchip: evb_rk3288: Add console settingsSuniel Mahesh
Add console settings like stdin, stdout and stderr as usbkbd and vidconsole respectively for evb-rk3288 targets. This would certainly help to detect the attached video devices (like HDMI) and print the console messages on display. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: rk3399: Add default env to support compressed kernel ImageKever Yang
Add default kernel_comp_addr_r and kernel_comp_size to support boot from compressed kernel Image, this space is temporarily used during decompress according to README.distro. Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22rockchip: board: add Hardkernel Odroid Go2 boardHeiko Stuebner
Also known as Odroid Go Advance but named Go2 internally by the vendor it seems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22lib: crypto: export and enhance pkcs7_verify_one()AKASHI Takahiro
The function, pkcs7_verify_one(), will be utilized to rework signature verification logic aiming to support intermediate certificates in "chain of trust." To do that, its function interface is expanded, adding an extra argument which is expected to return the last certificate in trusted chain. Then, this last one must further be verified with signature database, db and/or dbx. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-22lib: crypto: add public_key_verify_signature()AKASHI Takahiro
This function will be called from x509_check_for_self_signed() and pkcs7_verify_one(), which will be imported from linux in a later patch. While it does exist in linux code and has a similar functionality of rsa_verify(), it calls further linux-specific interfaces inside. That could lead to more files being imported from linux. So simply re-implement it here instead of re-using the code. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-07-22efi_loader: Rename and correct values for ARM_SMC_MM_*Ilias Apalodimas
Instead of adding the definition for the specific MM SVC used in StandAloneMM we added the one used in the standard SMC calls. So change the value from -4 to -5 to match the correct one defined in EDK2 and rename them to avoid future confusion Fixes 23a397d2e2fb: ("efi_loader: Add headers for EDK2 StandAloneMM communication") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-20dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matchingDave Gerlach
Introduce UCLASS_SOC to be used for SOC identification and attribute matching based on the SoC ID info. This allows drivers to be provided for SoCs to retrieve SoC identifying information and also for matching device attributes for selecting SoC specific data. This is useful for other device drivers that may need different parameters or quirks enabled depending on the specific device variant in use. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-20Revert "lib: fdt: Split fdtdec_setup_mem_size_base()"Michal Simek
This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20Revert "lib: fdt: Split fdtdec_setup_memory_banksize()"Michal Simek
This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-20cpu: Convert the methods to use a const udevice *Simon Glass
These functions should not modify the device. Convert them to const so that callers don't need to cast if they have a const udevice *. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-20mtd: spinand: micron: identify SPI NAND device with Continuous Read modeShivamurthy Shastri
Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with the Continuous Read mode. Some of the Micron SPI NAND devices have the "Continuous Read" feature enabled by default, which does not fit the subsystem needs. In this mode, the READ CACHE command doesn't require the starting column address. The device always output the data starting from the first column of the cache register, and once the end of the cache register reached, the data output continues through the next page. With the continuous read mode, it is possible to read out the entire block using a single READ command, and once the end of the block reached, the output pins become High-Z state. However, during this mode the read command doesn't output the OOB area. Hence, we disable the feature at probe time. Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-20global_data: Add a generic global_data flag for SMP stateSimon Glass
Allow keeping track of whether all CPUs have been enabled yet. This allows us to know whether other CPUs need to be considered when updating CPU-specific settings such as MTRRs on x86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-18mips: octeon: Add minimal Octeon 3 EBB7304 EVK supportStefan Roese
This patch adds very basic minimal support for the Marvell Octeon 3 CN73xx based EBB7304 EVK. Please note that the basic Octeon port does not support DDR3/4 initialization yet. To still use U-Boot on with this port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot to the prompt on this board. Supported devices: - UART - reset - CFI parallel NOR flash Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-17include: pci_ids: Add Cavium devicesSuneel Garapati
Add VendorID and DeviceID for supported devices on OcteonTX/TX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-07-17remove include/config_defaults.hRasmus Villemoes
Since commit 4b0bcfa7c4ec (Kconfig: Migrate CONFIG_BOOTM_* options), the config_defaults.h file has been void of any actual content - and these days, "sane defaults for everyone" is achieved by appropriate default values in Kconfig. Remove it, and thus make every translation unit process one less header file. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-17asm/u-boot.h: remove bd_t definitionsMasahiro Yamada
All the users of bd_t were converted to struct bd_info. Remove the definitions. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17treewide: convert bd_t to struct bd_info manuallyMasahiro Yamada
Some code was not converted by coccinelle, somehow. I manually fixed up the remaining, and comments, README docs. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> [trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and include/fdt_support.h] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-17treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17arm64: Remove CONFIG_SYS_FULL_VA macroMichal Simek
All configurations have been removed in 2016 by commit 7985cdf74b28 ("arm64: Remove non-full-va map code"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-07-17Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to KconfigPatrick Delaunay
This converts the following to Kconfig: CONFIG_ARMV7_PSCI_1_0 CONFIG_ARMV7_PSCI_0_2 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-17common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS imageTero Kristo
These cases are typically fatal and are difficult to debug for random users. Add checks for detecting overlapping images and abort if overlap is detected. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-07-17Convert CONFIG_MXC_UART to KconfigTom Rini
This converts the following to Kconfig: CONFIG_MXC_UART Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2020-07-17Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- New timer API to allow delays with a 32-bit microsecond timer - Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core - x86: Enable ACPI table generation by default - x86: Enable the copy framebuffer on Coral - x86: A few fixes to FSP2 with ApolloLake - x86: Drop setup_pcat_compatibility() - x86: Primary-to-Sideband Bus minor fixes
2020-07-17Merge tag 'u-boot-imx-20200716' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.10 ---------------- - i.MX DDR driver fix/update for i.MX8M - i.MX pinctrl driver fix. - Use arm_smccc_smc to remove imx sip function - i.MX8M clk update - support booting aarch32 kernel on aarch64 hardware - fused part support for i.MX8MP - imx6: pcm058 to DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785
2020-07-17x86: irq: Support flags for acpi_gpeSimon Glass
This binding currently has a flags cell but it is not used. Make use of it to create ACPI tables for interrupts. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17pmc: Move common registers to the header fileSimon Glass
These registers need to be accesses from ACPI code, so move them to the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17p2sb: Add a method to hide the busSimon Glass
The P2SB bus needs to be hidden in some cases so that it does not get auto-configured by Linux. Add a method for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17x86: pinctrl: Add a way to get the pinctrl reg addressSimon Glass
At present we can query the offset of a pinctrl register within the p2sb. For ACPI we need to get the actual address of the register. Add a function to handle this and rename the old one to more accurately reflect its purpose. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17acpi: Support writing named valuesSimon Glass
Allow writing named integers and strings to the generated ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> [bmeng: Fix the "new blank line at EOF" warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support generation of a deviceSimon Glass
Allow writing an ACPI device to the generated ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> [bmeng: Fix build failures on Sandbox] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17x86: Add bindings for NHLTSimon Glass
Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table (NHLT). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support generation of a generic registerSimon Glass
Allow writing out a generic register. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> [bmeng: Fix build failures on Sandbox] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support generation of a scopeSimon Glass
Add a function to write a scope to the generated ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: Fix build failures on Sandbox] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Export functions to write sized valuesSimon Glass
At present only acpigen_write_integer() is exported for use by other code. But in some cases it is useful to call the specific function depending on the size of the value. Export these functions and add a test. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: Fix the "new blank line at EOF" warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17dm: acpi: Add support for the NHLT tableSimon Glass
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the audio codecs and connections in a system. Various devices can contribute information to produce the table. Add core support for this, based on a structure which is built up through calls to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17dm: core: Add a way of overriding the ACPI device pathSimon Glass
Some devices such as GPIO need to override the normal path that would be generated by driver model. Add a device-tree property for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17binman: Add way to locate an entry in memorySimon Glass
Add support for accessing an entry's contents in memory-mapped SPI flash. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17binman: Allow setting the ROM offsetSimon Glass
On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way to tell binman the offset from a ROM address to a RAM address. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add an acpi command to list/dump generated ACPI itemsSimon Glass
Add a command that shows the individual blocks of data generated by each device, effectively splitting the full table into its component parts. This can be helpful for debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17dm: acpi: Enhance acpi_get_name()Simon Glass
For many device types it is possible to figure out the name just by looking at its uclass or parent. Add a function to handle this, since it allows us to cover the vast majority of cases automatically. However it is sometimes impossible to figure out an ACPI name for a device just by looking at its uclass. For example a touch device may have a vendor-specific name. Add a new "acpi,name" property to allow a custom name to be created. With this new feature we can drop the get_name() methods in the sandbox I2C and SPI drivers. They were only added for testing purposes. Update the tests to use the new values. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17pci: Avoid a crash in device_is_on_pci_bus()Simon Glass
This function cannot currently be called on the root node. Add a check for this as well as a test. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for DSDT generationSimon Glass
Some devices need to inject extra code into the Differentiated System Descriptor Table (DSDT). Add a method to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct one typo in inject_dsdt() comments] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for SSDT generationSimon Glass
Some devices need to generate code for the Secondary System Descriptor Table (SSDT). Add a method to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for a generic power sequenceSimon Glass
Add a way for devices to enable and disable themselves using ACPI code that updates GPIOs. This takes several timing parameters and supports enable, reset and stop. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for writing a GPIO power sequenceSimon Glass
Power to some devices is controlled by GPIOs. Add a way to generate ACPI code to enable and disable a GPIO so that this can be handled within an ACPI method. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for writing a Power ResourceSimon Glass
These are used in ACPI to disable power to various pats of the system when in sleep. Add a way to create a power resource, with the caller finishing off the details. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for various misc ACPI opcodesSimon Glass
Add more functions to handle some miscellaneous ACPI opcodes. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support copying properties from device tree to ACPISimon Glass
Some drivers in Linux support both device tree and ACPI. U-Boot itself uses Linux device-tree bindings for its own configuration but does not use ACPI. It is convenient to copy these values over to the ACPI DP table for passing to linux. Add some convenience functions to help with this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support writing a GPIOSimon Glass
Allowing writing out a reference to a GPIO within the ACPI output. This can be used by ACPI code to access a GPIO at runtime. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit (git 2.34.1) at 2025-01-23 07:32:50 +0000