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2012-09-01mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador
Most code can be shared between i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01mx28evk: Turn on cachesFabio Estevam
Turn on data and instruction caches. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01Add support for Bluegiga APX4 Development KitVeli-Pekka Peltola
This adds support for Bluegiga APX4 Development Kit. It is built around Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC, RTC and USB. APX4 has only one ethernet port. Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com> Cc: Stefano Babic <sbabic@denx.de>
2012-09-01at91: Add support for taskit AT91SAM9G20 boards.Markus Hubig
This adds support for the AT91SAM9G20 boards by taskit GmbH. Both boards, Stamp9G20 and PortuxG20, are integrated in one file. PortuxG20 is basically a SBC built around the Stamp9G20. Signed-off-by: Markus Hubig <mhubig@imko.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>
2012-09-01arm : Atmel : add at91sam9x5ek board supportBo Shen
Add at91sam9x5ek board support, this board support the following SoCs AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35 Using at91sam9x5ek_nandflash to configure for the board Now only supports NAND with software ECC boot up Signed-off-by: Bo Shen <voice.shen@atmel.com> [move MAINTAINERS entry to right place] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01am335x_evm: enable SMSC PHY driverIlya Yanok
Beaglebone uses SMSC PHY which works incorrectly with generic PHY driver so enable SMSC PHY driver to fix networking problems on Beaglebone. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01dm: Move OMAP GPIO driver to drivers/gpio/Marek Vasut
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01dm: Select CONFIG_SPL_GPIO_SUPPORT on OMAPMarek Vasut
This fixes the breakage with SPL on most OMAP boards after the GPIO driver was moved. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx evm: Add CONFIG_CMD_EEPROM and relatedTom Rini
am33xx boards have at least one eeprom and in the case of beaglebones with capes, more. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am335x_evm: Update config for common usageTom Rini
- Add default commands - Add HUSH parser - Make environment, malloc areas larger - Add ATAGS and OF_LIBFDT - Add defaults to boot ramdisk and MMC, use uEnv.txt Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01OMAP3: igep00x0: add SPL support for IGEP-based boardsJavier Martinez Canillas
This patch adds SPL support for IGEP-based boards. Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
2012-09-01OMAP3: igep00x0: Add config option to choose flash storage memoryJavier Martinez Canillas
IGEP-based boards can have two different flash memories, a OneNAND or a NAND device. Add a configuration option for to choose which memory to use. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2012-09-01am335x_evm: CPSW supportChandan Nath
This patch adds board-specific initialization for CPSW on TI AM335X based boards. Tested on BeagleBone. Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split board-specific part into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01cpsw: add driver for cpsw ethernet deviceCyril Chemparathy
CPSW is an on-chip ethernet switch that is found on various SoCs from Texas Instruments. This patch adds a simple driver (based on the Linux driver) for this hardware module. This patch also adds support to clean and flush dcache during packet send and receive. Changes by Sandhya: Added support to clean and flush dcache during packet send/receive and added timeouts. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> [Ilya: Cleaned cache handling, some style cleanup, some small fixes, use of internal RAM for descriptors] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01serial/ns16550: ns16550 has a different register layout on SOC_DA8XXMikhail Kshevetskiy
also fix NS16550_init() as we need 16x divider Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Acked-by: Christian Riesch <christian.riesch@omicron.at> Tested-by: Christian Riesch <christian.riesch@omicron.at> Acked-by: Sughosh Ganu <urwithsughosh@gmail.com> Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
2012-09-01omap: am335x_evm: enable i2c1 channelSteve Sakoman
This patch sets up pinmux, enables fclk, and defines CONFIG_I2C_MULTI_BUS Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-09-01beagle: fix termination of buddy env settingPeter Meerwald
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
2012-09-01igep00x0: default mmcrootfstype to EXT4Javier Martinez Canillas
omap2plus_defconfig now has built-in compile support for EXT4 enabled by default now. So, we can use EXT4 as the default root file system type for MMC. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2012-09-01igep00x0: default to OMAP-specific serial driverJavier Martinez Canillas
An OMAP specific serial driver was merged on the Linux kenel a long time ago. So, it makes sense to default the console name to OMAP ttyO instead of the generic ttyS naming. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2012-09-01da850/omap-l138: add support for direct NOR boot modeLad, Prabhakar
This patch adds support for direct NOR boot mode on da850/omap-l138. Added da850evm_direct_nor entry in boards.cfg to allow to build targets. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01da850/omap-l138: Add support for NAND SPLLad, Prabhakar
This patch adds configuration required for NAND SP on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01da850/omap-l138: Add support to read u-boot image from MMC/SDLad, Prabhakar
DA850/OMAP-L138 does not support strict MMC/SD boot mode. SPL will be in SPI flash and U-Boot image will be in MMC/SD card. SPL will do the low level initialization and then loads the u-boot image from MMC/SD card. Define CONFIG_SPL_MMC_LOAD macro in the DA850/OMAP-L138 configuration file to enable this feature. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01da850/omap-l138: Define SPI specific configs for SPL only when SPI is usedLad, Prabhakar
define SPI specific configs for SPL only when CONFIG_USE_SPIFLASH config is defined Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01da850/omap-l138: Make MMC and NOR support mutually exclusiveRajashekhara, Sudhakar
On Logic PD Rev.3 DA850/OMAP-L138 EVM, NOR and MMC/SD cannot work together. This patch enables the MMC/SD support only when NOR support is disabled. NOR Flash identification works even without this patch, but erase and write will have issues. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01da850/omap-l138: Add MMC support for DA850/OMAP-L138Lad, Prabhakar
This patch adds support for MMC/SD on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01omap: am335x_evm: remove unused definitionsSteve Sakoman
UART_RESET, UART_CLK_RUNNING_MASK, and UART_SMART_IDLE_EN are defined inn evm.c but not used. Also removes unnecessary include of serial.h PHYS_DRAM_1_SIZE is defined in am335x_evm.h but never used. Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-09-01OMAP3: mcx: read hot-water-button after resetStefano Babic
Detect hot-water-button to start a differnt image. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <trini@ti.com>
2012-09-01OMAP3: mcx: updated default environmentStefano Babic
Patch drops also not used CFI setup in the configuration file. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <trini@ti.com>
2012-09-01mcx: increased buffer for command lineStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <trini@ti.com>
2012-09-01hawkboard/omapl-138: Add support for generating ais image for hawkboardSughosh Ganu
Parameters used for configuring certain SoC peripherals are parsed from the cfg file and appended as part of the ais image's header. The u-boot-spl.ais generated is flashed separately to the nand, so do not delete the file after generation of u-boot.ais. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2012-09-01Consolidate bootcount code into drivers/bootcountStefan Roese
This patch moves all bootcount implementations into a common directory: drivers/bootcount. The generic bootcount driver is now usable not only by powerpc platforms, but others as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Manfred Rudigier <manfred.rudigier@omicron.at> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de> Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com> Tested-by: Christian Riesch <christian.riesch@omicron.at> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
2012-09-01mpc52xx: remove o2dnt boardAnatolij Gustschin
Remove old o2dnt board without OF support. New support for this board is added by the previous patch, O2I configuration. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-09-01mpc52xx: add common o2dnt and o2dnt2 support and configurationsAnatolij Gustschin
Add common code for o2dnt and o2dnt2 based boards and add different board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and O3DNT boards. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-09-01mpc5xxx: add pci_mpc5xxx_init prototype to common headerAnatolij Gustschin
Add pci_mpc5xxx_init() prototype to the header file, so board .c files do not need to add extern pci_mpc5xxx_init() declaration. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2012-08-24MIPS: add support for qemu for little endian MIPS32 CPUsDaniel Schwierzeck
Tested with 'qemu-system-mipsel -machine mips -bios u-boot.bin -nographic' Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-24MIPS: factor out endianess flag handling to arch config.mkDaniel Schwierzeck
This is CPU independent and should be configured architecture-wide. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-23powerpc/p1_p2_rdb_pc: print -PC suffix in board nameScott Wood
Currently the -PC variants of the P1/P2 RDB boards do not print it on boot -- e.g. a P2020RDB-PC will claim to be a plain P2020RDB. Besides being incorrect, this can confuse a user into building U-Boot for P2020RDB rather than P2020RDB-PC, resulting in a board that does not boot. P1024RDB and P1025RDB are not included, as these boards apparently do not have -PC as part of their name, even though they are supported by p1_p2_rdb_pc. The P2020RDB variant covered by this is apparently P2020RDB-PCA rather than P2020RDB-PC. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/mpc8xxx: Add fine timing support for DDR3York Sun
When the DDR3 speed goes higher, we need to utilize fine offset from SPD. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/fsl-corenet: remove dead variant symbolsScott Wood
These are not supported as individual build targets, but instead are supported by another target. The dead p4040 defines in particular had bitrotted significantly. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/85xx: remove support for the Freescale P3060Timur Tabi
The P3060 was cancelled before it went into production, so there's no point in supporting it. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23fm-eth: add function fm_info_get_phy_address()Timur Tabi
Function fm_info_get_phy_address() returns the PHY address for a given Fman port. This is handy when the MDIO code needs to fixup the Ethernet nodes in the device tree to point to PHY nodes for a specific PHY address. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/85xx: add support for FM2 DTSEC5Timur Tabi
Unlike previous SOCs, the Freescale P5040 has a fifth DTSEC on the second Fman, so add the Fman and SerDes macros for that DTSEC. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/CoreNet: add tool to support pbl image build.Shaohui Xie
Provides a tool to build boot Image for PBL(Pre boot loader) which is used on Freescale CoreNet SoCs, PBL can be used to load some instructions and/or data for pre-initialization. The default output image is u-boot.pbl, for more details please refer to doc/README.pblimage. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/corenet_ds: Slave module for boot from PCIELiu Gang
When boot from PCIE, slave's core should be in holdoff after powered on for some specific requirements. Master will release the slave's core at the right time by PCIE interface. Slave's ucode and ENV can be stored in master's memory space, then slave can fetch them through PCIE interface. For the corenet platform, ucode is for Fman. NOTE: Because the slave can not erase, write master's NOR flash by PCIE interface, so it can not modify the ENV parameters stored in master's NOR flash using "saveenv" or other commands. environment and requirement: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image is in master NOR flash. 3. Put the slave's ucode and ENV into it's own memory space. 4. Normally boot from local NOR flash. 5. Configure PCIE system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to one PCIE interface by RCW. 3. RCW should configure the SerDes, PCIE interfaces correctly. 4. Must set all the cores in holdoff by RCW. 5. Must be powered on before master's boot. For the slave module, need to finish these processes: 1. Set the boot location to one PCIE interface by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID of one PCIE for the boot. 4. Set a specific TLB entry in order to fetch ucode and ENV from master. 5. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 6. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. In addition, the processes are very similar between boot from SRIO and boot from PCIE. Some configurations like the address spaces can be set to the same. So the module of boot from PCIE was added based on the existing module of boot from SRIO, and the following changes were needed: 1. Updated the README.srio-boot-corenet to add descriptions about boot from PCIE, and change the name to README.srio-pcie-boot-corenet. 2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to "xxxx_SRIO_PCIE_BOOT", and the image builded with "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and from PCIE. 3. Updated other macros and documents if needed to add information about boot from PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/corenet_ds: Master module for boot from PCIELiu Gang
For the powerpc processors with PCIE interface, boot location can be configured from one PCIE interface by RCW. The processor booting from PCIE can do without flash for u-boot image. The image can be fetched from another processor's memory space by PCIE link connected between them. The processor booting from PCIE is slave, the processor booting from normal flash memory space is master, and it can help slave to boot from master's memory space. When boot from PCIE, slave's core should be in holdoff after powered on for some specific requirements. Master will release the slave's core at the right time by PCIE interface. Environment and requirement: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image is in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure PCIE system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to one PCIE interface by RCW. 3. RCW should configure the SerDes, PCIE interfaces correctly. 4. Must set all the cores in holdoff by RCW. 5. Must be powered on before master's boot. For the master module, need to finish these processes: 1. Initialize the PCIE port and address space. 2. Set inbound PCIE windows covered slave's u-boot image stored in master's NOR flash. 3. Set outbound windows in order to configure slave's registers for the core's releasing. 4. Should set the environment variable "bootmaster" to "PCIE1", "PCIE2" or "PCIE3" using the following command: setenv bootmaster PCIE1 saveenv Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macroLiu Gang
When compile the slave image for boot from SRIO, no longer need to specify which SRIO port it will boot from. The code will get this information from RCW and then finishes corresponding configurations. This has the following advantages: 1. No longer need to rebuild an image when change the SRIO port for boot from SRIO, just rewrite the new RCW with selected port, then the code will get the port information by reading new RCW. 2. It will be easier to support other boot location options, for example, boot from PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build targetLiu Gang
Get rid of the SRIOBOOT_MASTER build target, and to support for serving as a SRIO boot master via environment variable. Set the environment variable "bootmaster" to "SRIO1" or "SRIO2" using the following command: setenv bootmaster SRIO1 saveenv The "bootmaster" will enable the function of the SRIO boot master, and this has the following advantages compared with SRIOBOOT_MASTER build configuration: 1. Reduce a build configuration item in boards.cfg file. No longer need to build a special image for master, just use a normal target image and set the "bootmaster" variable. 2. No longer need to rebuild an image when change the SRIO port for boot from SRIO, just set the corresponding value to "bootmaster" based on the using SRIO port. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-21sh: tmu: Changed TMU driver using array of structuresNobuhiro Iwamatsu
This changed into access using array of structure from access to the register using the definition of the register by macro. And removed white space. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-08-13mtd/cfi_flash: fix write problems for Numonyx P33/30 32 MBit flashsHolger Brunck
commit 54652991 Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads to problems for smaller versions of this chip e.g. the 32Mbit version with deviceid 0x16 on mgcoge. So move the code for this work around to an own function and check previously manufacturer id and device id to not break other flashes which don't need this work around. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Heiko Schocher <hs@denx.de> cc: Stefan Roese <sr@denx.de> cc: Philippe De Muyter <phdm@macqel.be> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-08-13cfi_flash: add support for Spansion flash PPB sector protectionAnatolij Gustschin
Erasing flash sectors protected with persistent protection bit (PPB) mechanism on Spansion flash chips doesn't work. Add sector protection status checking and sector lock and unlock commands to fix this. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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