summaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Collapse)Author
2015-11-05include: Add log2 header from the kernelFabio Estevam
Use the log2 header files from the kernel. Imported from kernel 4.2.3. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-11-05Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2015-11-05Merge git://git.denx.de/u-boot-samsungTom Rini
2015-11-05Merge git://git.denx.de/u-boot-usbTom Rini
2015-11-05Merge git://git.denx.de/u-boot-socfpgaTom Rini
2015-11-05video: Drop DEV_EXT_VIDEO flagBin Meng
DEV_EXT_VIDEO does not have any actual meaning, hence drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-05video: Drop DEV_FLAGS_SYSTEM flagBin Meng
DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-05sandbox: adc: Add missing header filePrzemyslaw Marczak
Commit: sandbox: add ADC driver adds the driver without its main header file. It causes build brake for sandbox_defonfig. This commit adds a missing header: - include/sandbox-adc.h Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-05lib, fdt: Adding fdtdec_get_uint functionChin Liang See
Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de>
2015-11-04Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2015-11-04mpc85xx: Add support for the Varisys Cyrus boardAndy Fleming
This board runs a P5020 or P5040 chip, and utilizes an EEPROM with similar formatting to the Freescale P5020DS. Large amounts of this code were developed by Adrian Cox <adrian at humboldt dot co dot uk> Signed-off-by: Andy Fleming <afleming@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-04arm: zynq: Move serial driver to driver modelSimon Glass
Update this driver to use driver model and change all users. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04arm: zynq: Use separate device tree instead of embeddedSimon Glass
Production boards should not use CONFIG_OF_EMBED. Fix this for the Zybo boards. The image to use now becomes u-boot-dtb.bin. For example, the .bif file should contain a line like: [load = 0x04000000,startup=0x04000000]/path/to/u-boot-dtb.bin instead of: [load = 0x04000000,startup=0x04000000]/path/to/u-boot.bin When device tree is enabled we need to load u-boot-dtb.img. Change the settings so that SPL does the right thing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04dm: spl: Support device tree when BSS is in a different sectionSimon Glass
At present in SPL we place the device tree immediately after BSS. This avoids needing to copy it out of the way before BSS can be used. However on some boards BSS is not placed with the image - e.g. it can be in RAM if available. Add an option to tell U-Boot that the device tree should be placed at the end of the image binary (_image_binary_end) instead of at the end of BSS. Note: A common reason to place BSS in RAM is to support the FAT filesystem. We should update the code so that it does not use so much BSS. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04fdt: Add a function to look up a /chosen propertySimon Glass
It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04zynq-common: Define CONFIG_SYS_I2C_ZYNQ based on board configSiva Durga Prasad Paladugu
Enable CONFIG_SYS_I2C_ZYNQ only if it has either I2C0 or I2C1 enabled in a board config.This fixes the issue of i2c error during board init if board specific doesnt have either I2C0 or I2C1. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-03ARM: dra7xx_evm: Add DFU support for qspi flashVignesh R
This adds support to update firmware on qspi flash using DFU. On device: => setenv dfu_alt_info ${dfu_alt_info_qspi} => dfu 0 sf 0:0 On host: $ sudo dfu-util -l $ sudo dfu-util -D MLO -a MLO $ sudo dfu-util -D u-boot.img -a u-boot.img Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-03arm: at91: reworked meesc board supportDaniel Gorsulowski
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
2015-11-02T104xD4RDB: Fix PHY address for PHY connected to FM1@DTSEC3Codrin Ciubotariu
On T1040D4RDB board, u-boot fails to connect port FM1@DTSEC3 to the Ethernet PHY because the wrong PHY address is used. Also, T1040D4RDB supports SGMII on one port only. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02powerpc/t1040qds: enable peripheral clock for eSDHCYangbo Lu
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02powerpc/t1040qds: enable adapter card type identification supportYangbo Lu
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02sandbox: add ADC unit testsPrzemyslaw Marczak
This commit adds unit tests for ADC uclass's methods using sandbox ADC. Testing proper ADC binding: - dm_test_adc_bind() - device binding - dm_test_adc_wrong_channel_selection() - checking wrong channel selection Testing ADC supply operations: - dm_test_adc_supply(): - Vdd/Vss values validating - Vdd regulator updated value validating - Vdd regulator's auto enable state validating Testing ADC operations results: - dm_test_adc_single_channel_conversion() - single channel start/data - dm_test_adc_single_channel_shot() - single channel shot - dm_test_adc_multi_channel_conversion() - multi channel start/data - dm_test_adc_multi_channel_shot() - multi channel single shot Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02exynos5-dt-types: add board detection for Odroid XU3/XU3L/XU4.Przemyslaw Marczak
This commit adds additional file with implementation of board detection code for Odroid-XU3/XU4. The detection depends on compatible found in fdt: - "samsung,exynos5" - uses Exynos5 generic code - "samsung,odroidxu3" - try detect XU3 revision There are few revisions of Odroid XU3/XU4, each can be detected by checking the value of channel 9 of built-in ADC: Rev ADC Board 0.1 0 XU3 0.1 0.2 372 XU3 0.2 | XU3L - no DISPLAYPORT 0.3 1280 XU4 0.1 The detection code depends on the ADC+10% value. Implementation of functions: - set_board_type() - read ADC and set type - get_board_rev() - returns board revision: 1..3 - get_board_type() - returns board type string Additional functions with return values of bool: - board_is_generic() - true if found compatible "samsung,exynos5" but not "samsung,odroidxu3" - board_is_odroidxu3() - true if found compatible "samsung,odroidxu3" and one of XU3 revision. - board_is_odroidxu4() - true if found compatible "samsung,odroidxu3" and XU4 revision. After I2C controller init, the get_board_type() can check if the XU3 board is a "Lite" variant, by probing chip 0x40 on I2C0 (INA231 - exists only on non-lite). This is useful for setting fdt file name at misc_init_r(). Enabled configs: - CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - CONFIG_ODROID_REV_AIN - CONFIG_REVISION_TAG - CONFIG_BOARD_TYPES Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02dm: adc: add simple ADC uclass implementationPrzemyslaw Marczak
This commit adds: - new uclass id: UCLASS_ADC - new uclass driver: drivers/adc/adc-uclass.c The new uclass's API allows for ADC operation on: * single-channel with channel selection by a number * multti-channel with channel selection by bit mask ADC uclass's functions: * single-channel: - adc_start_channel() - start channel conversion - adc_channel_data() - get conversion data - adc_channel_single_shot() - start/get conversion data * multi-channel: - adc_start_channels() - start selected channels conversion - adc_channels_data() - get conversion data - adc_channels_single_shot() - start/get conversion data for channels selected by bit mask * general: - adc_stop() - stop the conversion - adc_vdd_value() - positive reference Voltage value with polarity [uV] - adc_vss_value() - negative reference Voltage value with polarity [uV] - adc_data_mask() - conversion data bit mask The device tree can provide below constraints/properties: - vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1) - vss-polarity-negative: if true: Vss = vss-microvolts * (-1) - vdd-supply: phandle to Vdd regulator's node - vss-supply: phandle to Vss regulator's node And optional, checked only if the above corresponding, doesn't exist: - vdd-microvolts: positive reference Voltage [uV] - vss-microvolts: negative reference Voltage [uV] Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02dm: regulator: add function device_get_supply_regulator()Przemyslaw Marczak
Some devices are supplied by configurable regulator's output. But there was no function for getting it. This commit adds function, that allows for getting the supply device by it's phandle. The returned regulator device can be used with regulator uclass's API. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02dm: pmic: add s2mps11 PMIC I/O driverPrzemyslaw Marczak
This driver allows I/O operations on the Samsung S2MPS11 PMIC, which provides lots of LDO/BUCK outputs. To enable it, update defconfig with: - CONFIG_PMIC_S2MPS11 and additional, if were not defined: - CONFIG_CMD_PMIC - CONFIG_ERRNO_STR The binding info: doc/device-tree-bindings/pmic/s2mps11.txt Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-01ARM: at91: sama5: change the environment address to 0x6000Josh Wu
As sama5 board has 32k sram size, so the at91bootstrap and spl for sama5 boards is bigger than 16k (0x4000). That will overlap the U-Boot environment. So I move environment to 0x6000. And reduce its size as well. Following shows the size of the spl binaries (v2015.04 vs v2015.07): % ls v2015.04/*spi*spl.bin -l | awk '{print $5,$(NF)}' 15540 v2015.04/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin 15704 v2015.04/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin 16064 v2015.04/sama5d3xek_spiflash_defconfig_u-boot-spl.bin 16304 v2015.04/sama5d4ek_spiflash_defconfig_u-boot-spl.bin 16304 v2015.04/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin % ls v2015.07/*spi*spl.bin -l | awk '{print $5,$(NF)}' 16136 v2015.07/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin 16300 v2015.07/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin 16664 v2015.07/sama5d3xek_spiflash_defconfig_u-boot-spl.bin 16904 v2015.07/sama5d4ek_spiflash_defconfig_u-boot-spl.bin 16904 v2015.07/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin The gcc version is: gcc 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1) Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Bo Shen <voice.shen@gmail.com>
2015-10-30Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini
2015-10-30ls102xa: Adjust some macros for SD boot on LS1021A QDS boardAlison Wang
As more features are added for SD boot on LS1021A QDS board, the size of U-Boot is larger. CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS needs to be adjusted to a suitable value. Starting address of the malloc pool used in SPL needs to be adjusted too, or it will occupy the address u-boot loads. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-30configs: ls1021atwr: Enable ID EEPROM for SD bootYao Yuan
I2C1 can work on ls102xa rev2.0 SD boot, so add ID EEPROM for SD boot. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-30drivers/ddr/fsl_ddr: Make SR_IE configurableJoakim Tjernlund
SR_IE(Self-refresh interrupt enable) is needed for Hardware Based Self-Refresh. Make it configurable and let board code handle the rest. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2015-10-29net: mdio: Add mdio_free() and mdio_unregister() APIBin Meng
Currently there is no API to uninitialize mdio. Add two APIs for this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: Increase the size of the net_boot_file_name bufferJacob Stiffler
The net_boot_file_name buffer is used as storage for the bootfilename command line argument to network boot commands such as tftp and nfs. Increase the size of this buffer to 1024 bytes as the current size of 128 bytes is restrictive for arbitrary paths on the server. Signed-off-by: Jacob Stiffler <j-stiffler@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29arm: ls102xa: Set fdt_high and initrd_high to the value of 0xffffffffAlison Wang
As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel fails to access the device tree blob on boot. The reason is that u-boot relocates the device tree blob into high memory when booting the kernel and the kernel is unable to access the blob. To avoid this issue, fdt_high is set to the value of 0xffffffff. The device tree blob will not get relocated and is still in low memory to make it accessible to the kernel. For the same reason, initrd_high is set to the value of 0xffffffff too. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043a: Enable secondary coresHou Zhiqiang
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to make secondary cores excute in spin loop. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add sd boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu
This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043a: Add Fman supportShaohui Xie
Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add nand boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add LS1043ARDB board supportMingkai Hu
LS1043ARDB Specification: ------------------------- Memory subsystem: * 2GByte DDR4 SDRAM (32bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * XFI 10G port * QSGMII with 4x 1G ports * Two RGMII ports PCIe: * PCIe2 (Lanes C) to mini-PCIe slot * PCIe3 (Lanes D) to PCIe slot USB 3.0: two super speed USB 3.0 type A ports UART: supports two UARTs up to 115200 bps for console Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-10-29armv8/fsl_lsch2: Add fsl_lsch2 SoCMingkai Hu
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with ARMv8 cores and 2rd generation of Chassis. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu
There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net/fm: fix MDIO controller base on FMAN2Shaohui Xie
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two FMANs, so we should only define MDIO controller base on FMAN2 when there is FMAN2. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net: Move some header files to include/Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv7/ls1021a: move ns_access to common fileMingkai Hu
Config Security Level Register is different between different SoCs, so put the CSL register definition into the arch specific directory. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29common/board_f.c: change the macro name and remove it for PPC platformsGong Qianyu
For most PPC platforms, they will call the first get_clocks() in init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is then defined to call the second get_clocks(), which should be redundant for PPC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8: ls2085ardb: enable CONFIG_PHY_AQUANTIAShaohui Xie
To support on board Aquantia's PHY AQR405. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29crypto/fsl: SEC driver cleanup for 64 bit and endiannessAneesh Bansal
The SEC driver code has been cleaned up to work for 64 bit physical addresses and systems where endianess of SEC block is different from the Core. Changes: 1. Descriptor created on Core is modified as per SEC block endianness before the job is submitted. 2. The read/write of physical addresses to Job Rings will be depend on endianness of SEC block as 32 bit low and high part of the 64 bit address will vary. 3. The 32 bit low and high part of the 64 bit address in descriptor will vary depending on endianness of SEC. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29Pointers in ESBC header made 32 bitAneesh Bansal
For the Chain of Trust, the esbc_validate command supports 32 bit fields for location of the image. In the header structure definition, these were declared as pointers which made them 64 bit on a 64 bit core. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>