From 120e92d9693b445c8397c159d26f60e4dbeadc4d Mon Sep 17 00:00:00 2001 From: Mian Yousaf Kaukab Date: Thu, 23 Jul 2020 15:41:16 +0200 Subject: ls1028a: use default scan_dev_for_boot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit scan_dev_for_efi is supposed to be called from scan_dev_for_boot. However this call is missing for ls1028ardb and ls1028aqds boards. As a result EFI boot doesn’t work. Fix this issue by removing custom definition of scan_dev_for_boot and use the default definition instead. Signed-off-by: Mian Yousaf Kaukab Reviewed-by: andy.tang@nxp.com Reviewed-by: Priyanka Jain --- include/configs/ls1028aqds.h | 7 ------- include/configs/ls1028ardb.h | 7 ------- 2 files changed, 14 deletions(-) diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 7bb740f48e..8ab943cc64 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -129,13 +129,6 @@ "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;" \ - "\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index e6f38f5d00..1a80cb945d 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -112,13 +112,6 @@ "run scan_dev_for_boot; " \ "fi; " \ "done\0" \ - "scan_dev_for_boot=" \ - "echo Scanning ${devtype} " \ - "${devnum}:${distro_bootpart}...; " \ - "for prefix in ${boot_prefixes}; do " \ - "run scan_dev_for_scripts; " \ - "done;" \ - "\0" \ "boot_a_script=" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${scriptaddr} ${prefix}${script}; " \ -- cgit From 7679afbfe39143c17079e3ee90413e6c391fa09c Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Thu, 30 Jul 2020 15:38:07 +0530 Subject: configs: ls1012a/ls1046a: Add CONFIG_ENV_OVERWRITE in defconfig CONFIG_ENV_OVERWRITE disables write protection on various environment variables like "ethaddr" and "serial". Enable this config in LS1046A and LS1012A defconfigs. This resolves an error while setting multiple values of "ethaddr" variable. Before the change: => setenv ethaddr 00:E0:0C:00:06:0 => setenv ethaddr 00:E0:0C:00:06:1 Error: Can't overwrite "ethaddr" Error inserting "ethaddr" variable, errno=1 After the change: => setenv ethaddr 00:E0:0C:00:06:0 => setenv ethaddr 00:E0:0C:00:06:1 Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012a2g5rdb_tfa_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig | 1 + configs/ls1012afrdm_tfa_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_defconfig | 1 + configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046afrwy_tfa_defconfig | 1 + configs/ls1046aqds_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_defconfig | 1 + configs/ls1046aqds_lpuart_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + 34 files changed, 34 insertions(+) diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 500b7d99ae..bd2d7d5692 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 9c36a43a45..0620b8fd00 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 369c955a77..1af77dca3d 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index ac04f7803f..a94887d649 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 8df3413a13..78e1f66673 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index afcabef16c..bdd4dbee57 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x401D0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 81dc72d4ec..5a58f7ce1e 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index d08d31d83f..7a15c8f0ad 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 5857d0de67..bd703adc56 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 76544b4ea2..9497654aca 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_DEFAULT_SPI_BUS=1 CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index ebbd43e3ff..c4730159b1 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_BUS=y CONFIG_ENV_SPI_BUS=0 diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 1f403d5c50..552364a5aa 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 439bd939c0..f50047933a 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40300000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 67a657a5e8..cf4324355d 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 512b0f347f..1bcf80cf6e 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index bc3ac506b5..5647fd52f9 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index d52d448cfd..2d76b35f79 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40500000 diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 023eb1db61..26b42fabec 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_I2C=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 1596e0a036..dfa1882279 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 1b7907f0a6..f37cdf7eba 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index eee635f6c5..5256f30960 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index e37625b117..466d7ca6c8 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40300000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index e17353e94d..959b8ffee9 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -51,6 +51,7 @@ CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 6bb4dd27ff..527eb0887b 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -49,6 +49,7 @@ CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 262d5b6944..6860e48d51 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_I2C=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 6c4f1b23e5..f481add1fb 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 98afaa793d..cd0ba8fbe5 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -45,6 +45,7 @@ CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 93b58c0b71..d7ee89c636 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 8a46e95a86..481c42c928 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40300000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 6c08716feb..327028619b 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -48,6 +48,7 @@ CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_ENV_IS_NOWHERE=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 9ab5850d1a..525caa6881 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -44,6 +44,7 @@ CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 2d9f2dba19..d5e519f705 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -44,6 +44,7 @@ CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 16fc990784..6ef4e24f18 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_I2C=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 249a55a2c3..d123a8df43 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40500000 -- cgit From b7585aa9b13b592fbad8b74c4c7c404a7350dd42 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Tue, 4 Aug 2020 00:16:33 +0200 Subject: pci: layerscape: Fix spurious writes and panic The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI root devices are layerscape PCIe controllers. Unfortunately, this is not true for the LS1028A. There is one additional static PCI root complex (this contains the networking devices) which has nothing to do with the layerscape PCIe controllers. On recent U-Boot versions this results in the following panic: "Synchronous Abort" handler, esr 0x96000044 elr: 000000009602fa04 lr : 000000009602f9f4 (reloc) elr: 00000000fbd73a04 lr : 00000000fbd739f4 x0 : 0080000002000101 x1 : 0000000000000000 x2 : 00000000fbde9000 x3 : 0000000000000001 x4 : 0000000000000000 x5 : 0000000000000030 x6 : 00000000fbdbd460 x7 : 00000000fbb3d3a0 x8 : 0000000000000002 x9 : 000000000000000c x10: 00000000ffffffe8 x11: 0000000000000006 x12: 000000000001869f x13: 0000000000000a2c x14: 00000000fbb3d2cc x15: 00000000ffffffff x16: 0000000000010000 x17: 0000000000000000 x18: 00000000fbb3fda0 x19: 0000000000000800 x20: 0000000000000000 x21: 00000001f0000000 x22: 0000000000000800 x23: 0000000000000009 x24: 00000000fbdc3c1b x25: 00000000fbdc28e5 x26: 00000000fbdcc008 x27: 00000000fbdc16e2 x28: 000000000f000000 x29: 00000000fbb3d3a0 Code: 394072a1 f94006a0 34000041 5ac00a94 (b8336814) Resetting CPU ... This bug already existed in former versions, but the spurious write was never trapped, because the destination address was a valid address (by pure luck). Make sure the PCI root is actually one of the expected PCIe layerscape controllers by matching its compatible string. Signed-off-by: Michael Walle Reviewed-by: Vladimir Oltean Tested-by: Heiko Thiery Reviewed-by: Priyanka Jain --- drivers/pci/pcie_layerscape_fixup.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 8315b0b590..1709cd3d23 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -188,6 +188,12 @@ static void fdt_fixup_pcie_ls(void *blob) pci_find_next_device(&dev)) { for (bus = dev; device_is_on_pci_bus(bus);) bus = bus->parent; + + /* Only do the fixups for layerscape PCIe controllers */ + if (!device_is_compatible(bus, "fsl,ls-pcie") && + !device_is_compatible(bus, CONFIG_FSL_PCIE_COMPAT)) + continue; + pcie_rc = dev_get_priv(bus); streamid = pcie_next_streamid(pcie_rc->stream_id_cur, -- cgit From 223c19076f8b6808ffcb3772dd91d890d180cd65 Mon Sep 17 00:00:00 2001 From: Ran Wang Date: Wed, 5 Aug 2020 15:07:27 +0800 Subject: fsl-layerscape: enable dwc3 snooping feature MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Configure DWC3’s cache type to ‘cacheable’ for better performance. Actually related register definition and values are SoC specific, which means this setting is only applicable to Layerscape SoC, not generic for all platforms which have integrated DWC3 IP. Signed-off-by: Ran Wang Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 37 +++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index fde893e8c9..5254cdf366 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -36,6 +36,8 @@ #ifdef CONFIG_TFABOOT #include #endif +#include +#include #if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS) DECLARE_GLOBAL_DATA_PTR; #endif @@ -897,6 +899,38 @@ __weak int fsl_board_late_init(void) return 0; } +#define DWC3_GSBUSCFG0 0xc100 +#define DWC3_GSBUSCFG0_CACHETYPE_SHIFT 16 +#define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \ + << DWC3_GSBUSCFG0_CACHETYPE_SHIFT) + +void enable_dwc3_snooping(void) +{ + int ret; + u32 val; + struct udevice *bus; + struct uclass *uc; + fdt_addr_t dwc3_base; + + ret = uclass_get(UCLASS_USB, &uc); + if (ret) + return; + + uclass_foreach_dev(bus, uc) { + if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) { + dwc3_base = devfdt_get_addr(bus); + if (dwc3_base == FDT_ADDR_T_NONE) { + dev_err(bus, "dwc3 regs missing\n"); + continue; + } + val = in_le32(dwc3_base + DWC3_GSBUSCFG0); + val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0); + val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222); + writel(val, dwc3_base + DWC3_GSBUSCFG0); + } + } +} + int board_late_init(void) { #ifdef CONFIG_CHAIN_OF_TRUST @@ -934,6 +968,9 @@ int board_late_init(void) fspi_ahb_init(); #endif + if (IS_ENABLED(CONFIG_DM)) + enable_dwc3_snooping(); + return fsl_board_late_init(); } #endif -- cgit From af288cb291da3abef6be0875527729296f7de7a0 Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Thu, 6 Aug 2020 14:38:19 +0800 Subject: arm64: Layerscape: Survive LPI one-way reset workaround The workaround of LPI one-way reset issue is broken by the series: https://patchwork.ozlabs.org/project/uboot/list/?series=192398 This patch is to add DT node for GIC RD tables and create corresponding reserved-memory node in kernel DT to fix it. Signed-off-by: Hou Zhiqiang Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 17 ++++++++++++++++- arch/arm/dts/fsl-ls1028a.dtsi | 6 ++++++ arch/arm/dts/fsl-ls1088a.dtsi | 6 ++++++ arch/arm/dts/fsl-ls2080a.dtsi | 6 ++++++ arch/arm/dts/fsl-lx2160a.dtsi | 6 ++++++ 5 files changed, 40 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 5254cdf366..87fb321c63 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -45,7 +45,22 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_GIC_V3_ITS int ls_gic_rd_tables_init(void *blob) { - int ret; + struct fdt_memory lpi_base; + fdt_addr_t addr; + fdt_size_t size; + int offset, ret; + + offset = fdt_path_offset(gd->fdt_blob, "/syscon@0x80000000"); + addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, offset, "reg", + 0, &size, false); + + lpi_base.start = addr; + lpi_base.end = addr + size - 1; + ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL); + if (ret) { + debug("%s: failed to add reserved memory\n", __func__); + return ret; + } ret = gic_lpi_tables_init(); if (ret) diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 9911690e5c..bf6373d5ec 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -44,6 +44,12 @@ IRQ_TYPE_LEVEL_LOW)>; }; + gic_lpi_base: syscon@0x80000000 { + compatible = "gic-lpi-base"; + reg = <0x0 0x80000000 0x0 0x100000>; + max-gic-redistributors = <2>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = ; }; + gic_lpi_base: syscon@0x80000000 { + compatible = "gic-lpi-base"; + reg = <0x0 0x80000000 0x0 0x100000>; + max-gic-redistributors = <8>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */ diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi index 90a0a3f8fb..6b7bf8eb16 100644 --- a/arch/arm/dts/fsl-ls2080a.dtsi +++ b/arch/arm/dts/fsl-ls2080a.dtsi @@ -26,6 +26,12 @@ interrupts = <1 9 0x4>; }; + gic_lpi_base: syscon@0x80000000 { + compatible = "gic-lpi-base"; + reg = <0x0 0x80000000 0x0 0x100000>; + max-gic-redistributors = <8>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */ diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi index dee1e2f215..37a4f39c8f 100644 --- a/arch/arm/dts/fsl-lx2160a.dtsi +++ b/arch/arm/dts/fsl-lx2160a.dtsi @@ -43,6 +43,12 @@ interrupts = <1 9 0x4>; }; + gic_lpi_base: syscon@0x80000000 { + compatible = "gic-lpi-base"; + reg = <0x0 0x80000000 0x0 0x200000>; + max-gic-redistributors = <16>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */ -- cgit From ada19fd2d2d45bf66f71cb1610a293d30058e7b6 Mon Sep 17 00:00:00 2001 From: Martin Kaistra Date: Fri, 21 Aug 2020 13:44:13 +0200 Subject: board/freescale/lsch3: Correct entry for 0.9v According to the reference manual of LS2088A, for a VDD voltage of 0.9V, the entry should be at 01000b. Fixes: 4911948ec73 ("board/freescale,lsch3: Add entry for 0.9v") Signed-off-by: Martin Kaistra Reviewed-by: Priyanka Jain --- board/freescale/common/vid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index ed0d9b471c..20c97aa1ef 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -533,10 +533,10 @@ int adjust_vdd(ulong vdd_override) 0, /* reserved */ 0, /* reserved */ 0, /* reserved */ + 9000, /* reserved */ 0, /* reserved */ 0, /* reserved */ 0, /* reserved */ - 9000, /* reserved */ 0, /* reserved */ 0, /* reserved */ 0, /* reserved */ -- cgit From c63edbc750f9416bb542b24c9b856cce4f2a33e1 Mon Sep 17 00:00:00 2001 From: Wasim Khan Date: Thu, 27 Aug 2020 19:13:34 +0530 Subject: board: freescale: emc2305: Pass chip_addr to set_fan_speed emc2305 is a common driver. It should not use platform specific i2c address for slave device. Pass chip_addr as agrument to emc2305_init() and set_fan_speed() so that emc2305 driver can be used with different platforms. Signed-off-by: Wasim Khan Reviewed-by: Priyanka Jain --- board/freescale/common/emc2305.c | 15 +++++++-------- board/freescale/common/emc2305.h | 7 +++---- board/freescale/lx2160a/lx2160a.c | 4 ++-- 3 files changed, 12 insertions(+), 14 deletions(-) diff --git a/board/freescale/common/emc2305.c b/board/freescale/common/emc2305.c index b1ca051db2..050b679f3c 100644 --- a/board/freescale/common/emc2305.c +++ b/board/freescale/common/emc2305.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018 NXP. + * Copyright 2018-2020 NXP. * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -14,7 +13,7 @@ DECLARE_GLOBAL_DATA_PTR; -void set_fan_speed(u8 data) +void set_fan_speed(u8 data, int chip_addr) { u8 index; u8 Fan[NUM_OF_FANS] = {I2C_EMC2305_FAN1, @@ -25,14 +24,14 @@ void set_fan_speed(u8 data) for (index = 0; index < NUM_OF_FANS; index++) { #ifndef CONFIG_DM_I2C - if (i2c_write(I2C_EMC2305_ADDR, Fan[index], 1, &data, 1) != 0) { + if (i2c_write(chip_addr, Fan[index], 1, &data, 1) != 0) { printf("Error: failed to change fan speed @%x\n", Fan[index]); } #else struct udevice *dev; - if (i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev)) + if (i2c_get_chip_for_busnum(0, chip_addr, 1, &dev)) continue; if (dm_i2c_write(dev, Fan[index], &data, 1) != 0) { @@ -43,18 +42,18 @@ void set_fan_speed(u8 data) } } -void emc2305_init(void) +void emc2305_init(int chip_addr) { u8 data; data = I2C_EMC2305_CMD; #ifndef CONFIG_DM_I2C - if (i2c_write(I2C_EMC2305_ADDR, I2C_EMC2305_CONF, 1, &data, 1) != 0) + if (i2c_write(chip_addr, I2C_EMC2305_CONF, 1, &data, 1) != 0) printf("Error: failed to configure EMC2305\n"); #else struct udevice *dev; - if (!i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev)) + if (!i2c_get_chip_for_busnum(0, chip_addr, 1, &dev)) if (dm_i2c_write(dev, I2C_EMC2305_CONF, &data, 1)) printf("Error: failed to configure EMC2305\n"); #endif diff --git a/board/freescale/common/emc2305.h b/board/freescale/common/emc2305.h index eddf537138..24c5410d12 100644 --- a/board/freescale/common/emc2305.h +++ b/board/freescale/common/emc2305.h @@ -1,8 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018 NXP + * Copyright 2018-2020 NXP * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __EMC2305_H_ @@ -17,7 +16,7 @@ #define NUM_OF_FANS 5 -void emc2305_init(void); -void set_fan_speed(u8 data); +void emc2305_init(int chip_addr); +void set_fan_speed(u8 data, int chip_addr); #endif /* __EMC2305_H_ */ diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index ace2a1927d..0ff987eeb4 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -114,8 +114,8 @@ int board_early_init_f(void) #ifdef CONFIG_EMC2305 select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305); - emc2305_init(); - set_fan_speed(I2C_EMC2305_PWM); + emc2305_init(I2C_EMC2305_ADDR); + set_fan_speed(I2C_EMC2305_PWM, I2C_EMC2305_ADDR); select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); #endif -- cgit From e5f1111a7919ee4d0596fec313f844bfad6db0ec Mon Sep 17 00:00:00 2001 From: Meenakshi Aggarwal Date: Tue, 1 Sep 2020 12:56:28 +0530 Subject: lx2160: Correct sd_boot environment variable Signed-off-by: Meenakshi Aggarwal Reviewed-by: Priyanka Jain --- include/configs/lx2160aqds.h | 2 +- include/configs/lx2160ardb.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index 3dd071fa25..1cc015c1c7 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -131,7 +131,7 @@ u8 qixis_esdhc_detect_quirk(void); "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ " bootm $load_addr#$BOARD\0" \ "sd_bootcmd=echo Trying load from sd card..;" \ - "mmcinfo; mmc read $load_addr " \ + "mmc dev 0; mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ "env exists secureboot && mmc read $kernelheader_addr_r "\ "$kernelhdr_addr_sd $kernelhdr_size_sd " \ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index f54edf356a..a51987e6b0 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -101,7 +101,7 @@ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ " bootm $load_addr#$BOARD\0" \ "sd_bootcmd=echo Trying load from sd card..;" \ - "mmcinfo; mmc read $load_addr " \ + "mmc dev 0; mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ "env exists secureboot && mmc read $kernelheader_addr_r "\ "$kernelhdr_addr_sd $kernelhdr_size_sd " \ -- cgit From d31f3a1b62889d0bc1bbd801760e0b0a55bc02f6 Mon Sep 17 00:00:00 2001 From: Meenakshi Aggarwal Date: Wed, 9 Sep 2020 14:06:05 +0530 Subject: armv8: lx2160a: fix reset sequence Make sure that SW_RST_REQ and RST_REQ_MSK are cleared before triggering hardware reset request. Signed-off-by: Thirupathaiah Annapureddy Signed-off-by: Meenakshi Aggarwal Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 8a2f4048ec..e610528544 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017-2019 NXP + * Copyright 2017-2020 NXP * Copyright 2014-2015 Freescale Semiconductor, Inc. */ @@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR; void __efi_runtime reset_cpu(ulong addr) { - u32 val; - #ifdef CONFIG_ARCH_LX2160A - val = in_le32(rstcr); - val |= 0x01; - out_le32(rstcr, val); + /* clear the RST_REQ_MSK and SW_RST_REQ */ + out_le32(rstcr, 0x0); + + /* initiate the sw reset request */ + out_le32(rstcr, 0x1); #else + u32 val; + /* Raise RESET_REQ_B */ val = scfg_in32(rstcr); val |= 0x02; -- cgit From 4e0dc38da007548702684bcd0b87700385f235a6 Mon Sep 17 00:00:00 2001 From: "hui.song" Date: Thu, 10 Sep 2020 17:28:30 +0800 Subject: armv8: dts: fsl-lx2160a: add gpio0 gpio1 gpio3 DT nodes add gpio0 gpio1 gpio3 DT nodes to fsl-lx21600.dtsi Signed-off-by: hui.song Reviewed-by: Heiko Schocher Reviewed-by: Priyanka Jain --- arch/arm/dts/fsl-lx2160a.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi index 37a4f39c8f..744bd99ead 100644 --- a/arch/arm/dts/fsl-lx2160a.dtsi +++ b/arch/arm/dts/fsl-lx2160a.dtsi @@ -199,6 +199,28 @@ num-cs = <6>; }; + gpio0: gpio@2300000 { + compatible = "fsl,qoriq-gpio"; + reg = <0x0 0x2300000 0x0 0x10000>; + interrupts = <0 36 4>; + gpio-controller; + little-endian; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@2310000 { + compatible = "fsl,qoriq-gpio"; + reg = <0x0 0x2310000 0x0 0x10000>; + interrupts = <0 36 4>; + gpio-controller; + little-endian; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + gpio2: gpio@2320000 { compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2320000 0x0 0x10000>; @@ -210,6 +232,17 @@ #interrupt-cells = <2>; }; + gpio3: gpio@2330000 { + compatible = "fsl,qoriq-gpio"; + reg = <0x0 0x2330000 0x0 0x10000>; + interrupts = <0 37 4>; + gpio-controller; + little-endian; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + watchdog@23a0000 { compatible = "arm,sbsa-gwdt"; reg = <0x0 0x23a0000 0 0x1000>, -- cgit From 479cfd1fa6559b6b4e260b05657a0c09bb76c837 Mon Sep 17 00:00:00 2001 From: Grigore Popescu Date: Thu, 10 Sep 2020 12:59:03 +0300 Subject: drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabled The next DPMAC was always verified if it is enabled. In case of DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will be considered disabled and not detected by uboot. Signed-off-by: Grigore Popescu Signed-off-by: Ioana Ciornei Reviewed-by: Priyanka Jain --- drivers/net/ldpaa_eth/lx2160a.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ldpaa_eth/lx2160a.c b/drivers/net/ldpaa_eth/lx2160a.c index 9432b6eb85..1e62c64203 100644 --- a/drivers/net/ldpaa_eth/lx2160a.c +++ b/drivers/net/ldpaa_eth/lx2160a.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018 NXP + * Copyright 2018, 2020 NXP */ #include #include @@ -57,7 +57,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl) { enum srds_prtcl; - if (is_device_disabled(dpmac_id + 1)) + if (is_device_disabled(dpmac_id)) return PHY_INTERFACE_MODE_NONE; if (lane_prtcl >= SGMII1 && lane_prtcl <= SGMII18) -- cgit From b750695ac9a6116626c0d25b4e75c117ec4121b9 Mon Sep 17 00:00:00 2001 From: Madalin Bucur Date: Thu, 10 Sep 2020 13:23:39 +0300 Subject: drivers: net: phy: Use Aquantia driver for AQR113C Add support for AQR113C PHY Signed-off-by: Madalin Bucur Reviewed-by: Priyanka Jain --- drivers/net/phy/aquantia.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index 68cd3d03fd..9061afa620 100644 --- a/drivers/net/phy/aquantia.c +++ b/drivers/net/phy/aquantia.c @@ -680,6 +680,20 @@ struct phy_driver aqr112_driver = { .data = AQUANTIA_GEN3, }; +struct phy_driver aqr113c_driver = { + .name = "Aquantia AQR113C", + .uid = 0x31c31c12, + .mask = 0xfffffff0, + .features = PHY_10G_FEATURES, + .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS | + MDIO_MMD_PHYXS | MDIO_MMD_AN | + MDIO_MMD_VEND1), + .config = &aquantia_config, + .startup = &aquantia_startup, + .shutdown = &gen10g_shutdown, + .data = AQUANTIA_GEN3, +}; + struct phy_driver aqr405_driver = { .name = "Aquantia AQR405", .uid = 0x3a1b4b2, @@ -716,6 +730,7 @@ int phy_aquantia_init(void) phy_register(&aqr106_driver); phy_register(&aqr107_driver); phy_register(&aqr112_driver); + phy_register(&aqr113c_driver); phy_register(&aqr405_driver); phy_register(&aqr412_driver); -- cgit From 0649ab496a0b40ef96c91c1619b92a4e2360c983 Mon Sep 17 00:00:00 2001 From: Chaitanya Sakinam Date: Thu, 10 Sep 2020 16:50:53 +0530 Subject: ls1012a, pfe_eth: correction in delay implementation correction in delay implementation before we exit out of tx timeout. Signed-off-by: Chaitanya Sakinam Reviewed-by: Priyanka Jain --- drivers/net/pfe_eth/pfe_eth.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c index e49bf4a6f3..b74974c99a 100644 --- a/drivers/net/pfe_eth/pfe_eth.c +++ b/drivers/net/pfe_eth/pfe_eth.c @@ -176,9 +176,10 @@ static int pfe_eth_send(struct udevice *dev, void *packet, int length) udelay(100); i++; - if (i == 30000) + if (i == 30000) { printf("Tx timeout, send failed\n"); - break; + break; + } } return 0; -- cgit From ad8277270a8fb742e16dbec8d5e19916e34f1cb8 Mon Sep 17 00:00:00 2001 From: Chaitanya Sakinam Date: Thu, 10 Sep 2020 16:50:54 +0530 Subject: ls1012a, pfe_eth: Update probe to avoid resource leak PFE DDR addresses are now stored on to a stack varaiable rather dynamic allocation. Signed-off-by: Chaitanya Sakinam Reviewed-by: Priyanka Jain --- drivers/net/pfe_eth/pfe_eth.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c index b74974c99a..3b4ca0393c 100644 --- a/drivers/net/pfe_eth/pfe_eth.c +++ b/drivers/net/pfe_eth/pfe_eth.c @@ -214,27 +214,22 @@ static int pfe_eth_recv(struct udevice *dev, int flags, uchar **packetp) static int pfe_eth_probe(struct udevice *dev) { struct pfe_eth_dev *priv = dev_get_priv(dev); - struct pfe_ddr_address *pfe_addr; + struct pfe_ddr_address pfe_addr; struct pfe_eth_pdata *pdata = dev_get_platdata(dev); int ret = 0; static int init_done; if (!init_done) { - pfe_addr = (struct pfe_ddr_address *)malloc(sizeof - (struct pfe_ddr_address)); - if (!pfe_addr) - return -ENOMEM; - - pfe_addr->ddr_pfe_baseaddr = + pfe_addr.ddr_pfe_baseaddr = (void *)pdata->pfe_ddr_addr.ddr_pfe_baseaddr; - pfe_addr->ddr_pfe_phys_baseaddr = + pfe_addr.ddr_pfe_phys_baseaddr = (unsigned long)pdata->pfe_ddr_addr.ddr_pfe_phys_baseaddr; debug("ddr_pfe_baseaddr: %p, ddr_pfe_phys_baseaddr: %08x\n", - pfe_addr->ddr_pfe_baseaddr, - (u32)pfe_addr->ddr_pfe_phys_baseaddr); + pfe_addr.ddr_pfe_baseaddr, + (u32)pfe_addr.ddr_pfe_phys_baseaddr); - ret = pfe_drv_init(pfe_addr); + ret = pfe_drv_init(&pfe_addr); if (ret) return ret; -- cgit From 858056b0e00ba4abe6f85ed1043816d69e05a99f Mon Sep 17 00:00:00 2001 From: Madalin Bucur Date: Fri, 11 Sep 2020 10:24:09 +0300 Subject: driver: net: fm: add support for XFI All the 10G ports that were working in XFI mode were described as using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time). Add the minimal changes required for the FMan code to support XFI. Signed-off-by: Madalin Bucur Reviewed-by: Priyanka Jain --- drivers/net/fm/memac.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c index 0f0f7b0732..36f50d2782 100644 --- a/drivers/net/fm/memac.c +++ b/drivers/net/fm/memac.c @@ -98,6 +98,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac, if_mode &= ~IF_MODE_MASK; if_mode |= (IF_MODE_GMII); break; + case PHY_INTERFACE_MODE_XFI: case PHY_INTERFACE_MODE_XGMII: if_mode &= ~IF_MODE_MASK; if_mode |= IF_MODE_XGMII; @@ -106,7 +107,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac, break; } /* Enable automatic speed selection for Non-XGMII */ - if (type != PHY_INTERFACE_MODE_XGMII) + if (type != PHY_INTERFACE_MODE_XGMII && type != PHY_INTERFACE_MODE_XFI) if_mode |= IF_MODE_EN_AUTO; if (type == PHY_INTERFACE_MODE_RGMII || -- cgit From 450d491293bb600cd16ccadbe947d977b1f2142f Mon Sep 17 00:00:00 2001 From: Wasim Khan Date: Wed, 23 Sep 2020 19:34:45 +0530 Subject: arm: dts: lx2160a: Add IO range Add IO range property to fix below error on uboot PCI: Failed autoconfig bar 18 Signed-off-by: Wasim Khan [Rebased] Signed-off-by: Priyanka Jain --- arch/arm/dts/fsl-lx2160a.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi index 744bd99ead..bfdf178738 100644 --- a/arch/arm/dts/fsl-lx2160a.dtsi +++ b/arch/arm/dts/fsl-lx2160a.dtsi @@ -336,7 +336,8 @@ #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; + ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; pcie@3500000 { @@ -351,7 +352,8 @@ device_type = "pci"; num-lanes = <2>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; + ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; pcie@3600000 { @@ -365,7 +367,8 @@ #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; + ranges = <0x81000000 0x0 0x00000000 0x90 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; pcie@3700000 { @@ -379,7 +382,8 @@ #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; + ranges = <0x81000000 0x0 0x00000000 0x98 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; pcie@3800000 { @@ -393,7 +397,8 @@ #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; + ranges = <0x81000000 0x0 0x00000000 0xa0 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; pcie@3900000 { @@ -407,7 +412,8 @@ #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; + ranges = <0x81000000 0x0 0x00000000 0xa8 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; fsl_mc: fsl-mc@80c000000 { -- cgit From 63d534461555c7948eeddf6250f76019b329b15a Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Fri, 11 Sep 2020 16:36:48 +0530 Subject: net: pfe_eth: Fix resoure leak in pfe_spi_flash_init Fix Coverity issue: RESOURCE_LEAK. leaked_storage: Variable addr going out of scope leaks the storage it points to. Fixes: e0152dbed683 ("net: pfe_eth: Use spi_flash_read API to access flash memory") Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- drivers/net/pfe_eth/pfe_firmware.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index 55e661c0e1..4ad09dda1c 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -170,6 +170,9 @@ int pfe_spi_flash_init(void) int ret = 0; void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); + if (!addr) + return -ENOMEM; + #ifdef CONFIG_DM_SPI_FLASH struct udevice *new; @@ -186,6 +189,7 @@ int pfe_spi_flash_init(void) #endif if (!pfe_flash) { printf("SF: probe for pfe failed\n"); + free(addr); return -ENODEV; } -- cgit From 6fe7743d05ce1006d4436f2776d58216bd1d0c0a Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Fri, 11 Sep 2020 16:36:49 +0530 Subject: net: pfe_eth: Remove non-DM code check from pfe_spi_flash_init CONFIG_DM_SPI_FLASH is only supported now with passing of driver conversion deadline from non-DM to DM model. Hence, it's safe to remove non-DM code check from pfe_spi_flash_init. Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of reading reading values from DT. Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- drivers/net/pfe_eth/pfe_firmware.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index 4ad09dda1c..d414c750d4 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -167,26 +167,20 @@ static int pfe_fit_check(void) int pfe_spi_flash_init(void) { struct spi_flash *pfe_flash; + struct udevice *new; int ret = 0; void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); if (!addr) return -ENOMEM; -#ifdef CONFIG_DM_SPI_FLASH - struct udevice *new; - - /* speed and mode will be read from DT */ ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, 0, 0, &new); + CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, + CONFIG_ENV_SPI_MODE, + &new); pfe_flash = dev_get_uclass_priv(new); -#else - pfe_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, - CONFIG_ENV_SPI_MODE); -#endif if (!pfe_flash) { printf("SF: probe for pfe failed\n"); free(addr); -- cgit From 8ec619f8fd847eb80d75fa0a582e1fa3c74a21a7 Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Sun, 13 Sep 2020 23:12:50 +0800 Subject: pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A rev2 LX2160A rev2 uses different PCIe controller, so EP mode DT nodes also need to be fixed up. Signed-off-by: Hou Zhiqiang Reviewed-by: Priyanka Jain --- drivers/pci/pcie_layerscape_fixup_common.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index fef0a75f11..0a42997696 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -41,6 +41,8 @@ int lx2_board_fix_fdt(void *fdt) { "config_axi_slave", "config" } }; int off = -1, i; + const fdt32_t *prop; + u32 ob_wins, ib_wins; off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie"); while (off != -FDT_ERR_NOTFOUND) { @@ -86,6 +88,30 @@ int lx2_board_fix_fdt(void *fdt) off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie"); } + + /* Fixup PCIe EP nodes */ + off = -1; + off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie-ep"); + while (off != -FDT_ERR_NOTFOUND) { + fdt_setprop_string(fdt, off, "compatible", + "fsl,lx2160ar2-pcie-ep"); + prop = fdt_getprop(fdt, off, "apio-wins", NULL); + if (!prop) { + printf("%s: Failed to fixup PCIe EP node @0x%x\n", + __func__, off); + continue; + } + + ob_wins = fdt32_to_cpu(*prop); + ib_wins = (ob_wins == 256) ? 24 : 8; + fdt_setprop_u32(fdt, off, "num-ib-windows", ib_wins); + fdt_setprop_u32(fdt, off, "num-ob-windows", ob_wins); + fdt_delprop(fdt, off, "apio-wins"); + + off = fdt_node_offset_by_compatible(fdt, off, + "fsl,lx2160a-pcie-ep"); + } + return 0; } -- cgit