From 68e74567cf317318df52dbcb2ac170ffc5e7758a Mon Sep 17 00:00:00 2001 From: Feng Kan Date: Fri, 21 Aug 2009 10:59:42 -0700 Subject: ppc4xx: Fix ECC Correction bug with SMC ordering for NDFC driver Fix ECC Correction bug where the byte offset location were double flipped causing correction routine to toggle the wrong byte location in the ECC segment. The ndfc_calculate_ecc routine change the order of getting the ECC code. /* The NDFC uses Smart Media (SMC) bytes order */ ecc_code[0] = p[2]; ecc_code[1] = p[1]; ecc_code[2] = p[3]; But in the Correction algorithm when calculating the byte offset location, the s1 is used as the upper part of the address. Which again reverse the order making the final byte offset address location incorrect. byteoffs = (s1 << 0) & 0x80; . . byteoffs |= (s0 >> 4) & 0x08; The order is change to read it in straight and let the correction function to revert it to SMC order. Signed-off-by: Feng Kan Acked-by: Victor Gallardo Acked-by: Prodyut Hazarika Signed-off-by: Stefan Roese --- drivers/mtd/nand/ndfc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 528b22b49a..0891936f00 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -89,8 +89,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo, /* The NDFC uses Smart Media (SMC) bytes order */ - ecc_code[0] = p[2]; - ecc_code[1] = p[1]; + ecc_code[0] = p[1]; + ecc_code[1] = p[2]; ecc_code[2] = p[3]; return 0; -- cgit