From fb7fe04da2187b9853d713cb643d01bd56813e3d Mon Sep 17 00:00:00 2001 From: Emmanuel Vadot Date: Fri, 12 May 2017 11:38:53 +0200 Subject: ARM: dts: sunxi: Change node name for pwrseq pin on Olinuxino-lime2-emmc The node name for the power seq pin is mmc2@0 like the mmc2_pins_a one. This makes the original node (mmc2_pins_a) scrapped out of the dtb and result in a unusable eMMC if U-Boot didn't configured the pins to the correct functions. Signed-off-by: Emmanuel Vadot Signed-off-by: Maxime Ripard Signed-off-by: Olliver Schinagl Acked-by: Maxime Ripard Reviewed-by: Jagan Teki --- arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts index 5ea4915f6d..10d307408f 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts @@ -56,7 +56,7 @@ }; &pio { - mmc2_pins_nrst: mmc2@0 { + mmc2_pins_nrst: mmc2-rst-pin { allwinner,pins = "PC16"; allwinner,function = "gpio_out"; allwinner,drive = ; -- cgit From 335d30050b0d02444c9297f7a9b0cbf75dce847f Mon Sep 17 00:00:00 2001 From: Olliver Schinagl Date: Fri, 12 May 2017 11:38:54 +0200 Subject: sun7i: Add support for Olimex A20-OLinuXino-LIME2-eMMC This patch adds support for the Olimex OLinuXino Lime2 with eMMC flash storage. https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME2-eMMC/ It is a assembly variant of the regular Lime2 but featuring eMMC for storage. Signed-off-by: Olliver Schinagl Signed-off-by: Jagan Teki Acked-by: Maxime Ripard Reviewed-by: Jagan Teki --- board/sunxi/MAINTAINERS | 5 +++++ configs/A20-OLinuXino-Lime2-eMMC_defconfig | 36 ++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) create mode 100644 configs/A20-OLinuXino-Lime2-eMMC_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index e9f3e350d0..ed4d4c3ba8 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -88,6 +88,11 @@ M: Iain Paton S: Maintained F: configs/A20-OLinuXino-Lime2_defconfig +A20-OLINUXINO-LIME2-EMMC BOARD +M: Olliver Schinagl +S: Maintained +F: configs/A20-OLinuXino-Lime2-eMMC_defconfig + A33-OLINUXINO BOARD M: Stefan Mavrodiev S: Maintained diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig new file mode 100644 index 0000000000..034ae983a5 --- /dev/null +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -0,0 +1,36 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_MMC0_CD_PIN="PH1" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_VBUS_PIN="PC17" +CONFIG_USB0_VBUS_DET="PH5" +CONFIG_I2C1_ENABLE=y +CONFIG_SATAPWR="PC3" +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_DFU=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_DFU_RAM=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_RGMII=y +CONFIG_SUN7I_GMAC=y +CONFIG_AXP_ALDO3_VOLT=2800 +CONFIG_AXP_ALDO4_VOLT=2800 +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" +CONFIG_G_DNL_VENDOR_NUM=0x1f3a +CONFIG_G_DNL_PRODUCT_NUM=0x1010 -- cgit From 8792a64d87708139bc0cf8b48d4a580a39167473 Mon Sep 17 00:00:00 2001 From: Clément Bœsch Date: Sun, 23 Jul 2017 22:14:23 +0200 Subject: sunxi: reduce Orange Pi Zero DRAM clock speed MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Using `fel-boot-lima-memtester-on-orange-pi-pc 672` on an Orange Pi without heatsink results in the following error after a few minutes: WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip). Also, the constructor repository (github/orangepi-xunlong) seems to contain that 624 Mhz clock speed in its u-boot fork. It may be that 672 Mhz is the advertized overclocked speed. According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit it may be worth decreasing that value with other Orange Pi boards. See also e7d6aa0b74b7f4d08ee68da8a586c76c761348e2. Signed-off-by: Clément Bœsch [Add s-o-b line] Signed-off-by: Jagan Teki Reviewed-by: Jagan Teki --- configs/orangepi_zero_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index c650ce87d9..16a3929aa5 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_MACH_SUN8I_H3=y -CONFIG_DRAM_CLK=672 +CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set -- cgit From 39858b12cceed3894cc62d194f098396f4306c0c Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Thu, 20 Jul 2017 14:00:31 +0800 Subject: sunxi: add PRCM secure switch register definition Some new Allwinner SoCs' PRCM has a secure switch register, which controls the access to some clock and power registers in PRCM block. Add the definition of this register and its bits in the PRCM header file. Signed-off-by: Icenowy Zheng Tested-by: Chen-Yu Tsai Reviewed-by: Jagan Teki --- arch/arm/include/asm/arch-sunxi/prcm.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h index ae3880b13b..ba4427c925 100644 --- a/arch/arm/include/asm/arch-sunxi/prcm.h +++ b/arch/arm/include/asm/arch-sunxi/prcm.h @@ -196,6 +196,10 @@ #define PRCM_CPU3_PWR_CLAMP(n) (((n) & 0xff) << 0) #define PRCM_CPU3_PWR_CLAMP_MASK PRCM_CPU3_PWR_CLAMP(0xff) +#define PRCM_SEC_SWITCH_APB0_CLK_NONSEC (0x1 << 0) +#define PRCM_SEC_SWITCH_PLL_CFG_NONSEC (0x1 << 1) +#define PRCM_SEC_SWITCH_PWR_GATE_NONSEC (0x1 << 2) + #ifndef __ASSEMBLY__ #include @@ -233,6 +237,8 @@ struct __packed sunxi_prcm_reg { u32 dram_pwr; /* 0x180 */ u8 res12[0xc]; /* 0x184 */ u32 dram_tst; /* 0x190 */ + u8 res13[0x3c]; /* 0x194 */ + u32 prcm_sec_switch; /* 0x1d0 */ }; void prcm_apb0_enable(u32 flags); -- cgit From e37a1b17e71521ce9385e305a87948d7ca55b4d8 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Thu, 20 Jul 2017 14:00:32 +0800 Subject: sunxi: switch PRCM to non-secure on H3/H5 SoCs The PRCM of H3/H5 SoCs have a secure/non-secure switch, which controls the access to some clock/power related registers in PRCM. Current Linux kernel will access the CPUS (AR100) clock in the PRCM block, so the PRCM should be switched to non-secure. Add code to switch the PRCM to non-secure. Signed-off-by: Icenowy Zheng Acked-by: Maxime Ripard Tested-by: Chen-Yu Tsai Reviewed-by: Jagan Teki --- arch/arm/mach-sunxi/clock_sun6i.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index ec5b026ef5..870ff5b1e0 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -66,11 +66,17 @@ void clock_init_sec(void) #ifdef CONFIG_MACH_SUNXI_H3_H5 struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + struct sunxi_prcm_reg * const prcm = + (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; setbits_le32(&ccm->ccu_sec_switch, CCM_SEC_SWITCH_MBUS_NONSEC | CCM_SEC_SWITCH_BUS_NONSEC | CCM_SEC_SWITCH_PLL_NONSEC); + setbits_le32(&prcm->prcm_sec_switch, + PRCM_SEC_SWITCH_APB0_CLK_NONSEC | + PRCM_SEC_SWITCH_PLL_CFG_NONSEC | + PRCM_SEC_SWITCH_PWR_GATE_NONSEC); #endif } -- cgit From a8df97d0da52b3a418de38db589357db82823214 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Tue, 4 Jul 2017 18:43:11 +0800 Subject: sunxi: add MACPWR in Orange Pi PC2 defconfig The Ethernet function is enabled in the Orange Pi PC2 device tree and defconfig, however, CONFIG_MACPWR is not properly set, which left the PHY being disabled when booting, which makes the Ethernet function not usable. Add the proper value of this option in the PC2 defconfig. Fixes: e7bd15ea156f ("sunxi: Add OrangePi PC 2 initial support") Signed-off-by: Icenowy Zheng Acked-by: Andre Przywara Reviewed-by: Jagan Teki --- configs/orangepi_pc2_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 5a64ad3f41..b72514d3b9 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 +CONFIG_MACPWR="PD6" CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -- cgit From 7e4bef711e314841a978f1c62f6570cb0ebe0fe6 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 9 Jun 2017 17:57:58 +0530 Subject: sun50i: a64: Sync Linux [oe]hci0 nodes Synced ohci0 and ehci0 nodes from Linux for sun50i-a64.dtsi Here is the Linux last merge tag details: Merge: 0e91f43d e5770b7 Author: Stephen Rothwell Date: Fri Jun 9 14:59:55 2017 +1000 Merge remote-tracking branch 'staging/staging-next' Signed-off-by: Jagan Teki --- arch/arm/dts/sun50i-a64.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index c7f669f588..65a344d9ce 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -204,6 +204,28 @@ #phy-cells = <1>; }; + ehci0: usb@01c1a000 { + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + status = "disabled"; + }; + + ohci0: usb@01c1a400 { + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + ehci1: usb@01c1b000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; -- cgit From f322657204eb752f77c5bf0b7d71c0e99ed55691 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 9 Jun 2017 18:31:17 +0530 Subject: sun50i: a64: Add initial NanoPi A64 support NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC. Nanopi A64 features - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS - 1GB DDR3 RAM - MicroSD - Gigabit Ethernet (RTL8211E) - Wi-Fi 802.11b/g/n - IR receiver - Audio In/Out - Video In/Out - Serial Debug Port - microUSB 5V 2A DC power-supply Signed-off-by: Jagan Teki Tested-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-a64-nanopi-a64.dts | 115 +++++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 ++ configs/nanopi_a64_defconfig | 15 +++++ 4 files changed, 136 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-nanopi-a64.dts create mode 100644 configs/nanopi_a64_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c2dc240edf..8da32d83f7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -335,6 +335,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \ sun50i-h5-orangepi-zero-plus2.dtb dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-bananapi-m64.dtb \ + sun50i-a64-nanopi-a64.dtb \ sun50i-a64-orangepi-win.dtb \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts new file mode 100644 index 0000000000..778636c73a --- /dev/null +++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-a64.dtsi" + +#include + +/ { + model = "FriendlyARM NanoPi A64"; + compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +/* i2c1 connected with gpio headers like pine64, bananapi */ +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "disabled"; +}; + +&i2c1_pins { + bias-pull-up; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index ed4d4c3ba8..3b8d544103 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -272,6 +272,11 @@ M: Jelle van der Waa S: Maintained F: configs/nanopi_neo_air_defconfig +NANOPI-A64 BOARD +M: Jagan Teki +S: Maintained +F: configs/nanopi_a64_defconfig + NINTENDO NES CLASSIC EDITION BOARD M: FUKAUMI Naoki S: Maintained diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig new file mode 100644 index 0000000000..2f4ed11b13 --- /dev/null +++ b/configs/nanopi_a64_defconfig @@ -0,0 +1,15 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y -- cgit From 585bf8ae6f467d85b8e9f17141c8562d96a83c51 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Sat, 12 Aug 2017 18:18:58 +0530 Subject: sun50i: a64: Add A64-OLinuXino initial support OLimex A64-OLinuXino is an open-source hardware board using the Allwinner A64 SOC. OLimex A64-OLinuXino has - A64 Quad-core Cortex-A53 64bit - 1GB or 2GB RAM DDR3L @ 672Mhz - microSD slot and 4/8/16GB eMMC - Debug TTL UART - HDMI - LCD - IR receiver - 5V DC power supply Tested-by: Jagan Teki Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-a64-olinuxino.dts | 84 +++++++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 +++ configs/a64-olinuxino_defconfig | 15 +++++++ 4 files changed, 105 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-olinuxino.dts create mode 100644 configs/a64-olinuxino_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8da32d83f7..21a8103aee 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -336,6 +336,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \ dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-bananapi-m64.dtb \ sun50i-a64-nanopi-a64.dtb \ + sun50i-a64-olinuxino.dtb \ sun50i-a64-orangepi-win.dtb \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts new file mode 100644 index 0000000000..7bd4730c93 --- /dev/null +++ b/arch/arm/dts/sun50i-a64-olinuxino.dts @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2017 Jagan Teki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-a64.dtsi" + +#include + +/ { + model = "Olimex A64-Olinuxino"; + compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 3b8d544103..ff6eea24a5 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -98,6 +98,11 @@ M: Stefan Mavrodiev S: Maintained F: configs/A33-OLinuXino_defconfig +A64-OLINUXINO BOARD +M: Jagan Teki +S: Maintained +F: configs/a64-olinuxino_defconfig + A80 OPTIMUS BOARD M: Chen-Yu Tsai S: Maintained diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig new file mode 100644 index 0000000000..14f2c3d65f --- /dev/null +++ b/configs/a64-olinuxino_defconfig @@ -0,0 +1,15 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y -- cgit