From fc86faf9d6f7bb3a73aaee5af4836544a8636fc4 Mon Sep 17 00:00:00 2001 From: Eugeniy Paltsev Date: Mon, 16 Oct 2017 15:15:33 +0300 Subject: ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO With CONFIG_CMD_GPIO compilation reports error: -------------------------->8--------------------- common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include ^ -------------------------->8--------------------- Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- arch/arc/include/asm/gpio.h | 1 + 1 file changed, 1 insertion(+) create mode 100644 arch/arc/include/asm/gpio.h (limited to 'arch/arc') diff --git a/arch/arc/include/asm/gpio.h b/arch/arc/include/asm/gpio.h new file mode 100644 index 0000000000..306ab4c9f2 --- /dev/null +++ b/arch/arc/include/asm/gpio.h @@ -0,0 +1 @@ +#include -- cgit From e59c3797204b4cd565c0792620341e3d39f9240b Mon Sep 17 00:00:00 2001 From: Eugeniy Paltsev Date: Tue, 28 Nov 2017 16:48:40 +0300 Subject: ARC: add macro to get CPU id ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to uniquely identify each core in a multi-core system. I.e. with help of this macro each core may get its index in SMP system. Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- arch/arc/include/asm/arcregs.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arc') diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 54a9b00d4c..2a1bfc74ec 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -72,6 +72,9 @@ /* gcc builtin sr needs reg param to be long immediate */ #define write_aux_reg(reg_immed, val) \ __builtin_arc_sr((unsigned int)val, reg_immed) + +/* ARCNUM [15:8] - field to identify each core in a multi-core system */ +#define CPU_ID_GET() ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8) #endif /* __ASSEMBLY__ */ #endif /* _ASM_ARC_ARCREGS_H */ -- cgit From 64f47426315112e67af1214474659e0a55383dcc Mon Sep 17 00:00:00 2001 From: Eugeniy Paltsev Date: Tue, 28 Nov 2017 16:51:07 +0300 Subject: ARC: add defines of some cache and xCCM AUX registers Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- arch/arc/include/asm/arcregs.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arc') diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 2a1bfc74ec..ba1f7bac77 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -27,6 +27,12 @@ #define ARC_AUX_IC_PTAG 0x1E #endif #define ARC_BCR_IC_BUILD 0x77 +#define AUX_AUX_CACHE_LIMIT 0x5D +#define ARC_AUX_NON_VOLATILE_LIMIT 0x5E + +/* ICCM and DCCM auxiliary registers */ +#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */ +#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */ /* Timer related auxiliary registers */ #define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */ -- cgit From 3cf239394a5ca3ada68c683ef5d19e16f9bfd170 Mon Sep 17 00:00:00 2001 From: Eugeniy Paltsev Date: Thu, 30 Nov 2017 17:41:32 +0300 Subject: ARC: cache: explicitly initialize "*_exists" variables dcache_exists, icache_exists, slc_exists and ioc_exists global variables in "arch/arc/lib/cache.c" remain uninitialized if SoC doesn't have corresponding HW. This happens because we use the next constructions for their definition and initialization: -------------------------->>--------------------- int ioc_exists __section(".data"); if (/* condition */) ioc_exists = 1; -------------------------->>--------------------- That's quite a non-trivial issue as one may think of it. The point is we intentionally put those variables in ".data" section so they might survive relocation (remember we initilaize them very early before relocation and continue to use after reloaction). While being non-initialized and not explicitly put in .data section they would end-up in ".bss" section which by definition is filled with zeroes. But since we place those variables in .data section we need to care about their proper initialization ourselves. Also while at it we change their type to "bool" as more appropriate. Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- arch/arc/lib/cache.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/arc') diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index d8741fe959..1073e1570f 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -32,15 +32,15 @@ * relocation but will be used after being zeroed. */ int l1_line_sz __section(".data"); -int dcache_exists __section(".data"); -int icache_exists __section(".data"); +bool dcache_exists __section(".data") = false; +bool icache_exists __section(".data") = false; #define CACHE_LINE_MASK (~(l1_line_sz - 1)) #ifdef CONFIG_ISA_ARCV2 int slc_line_sz __section(".data"); -int slc_exists __section(".data"); -int ioc_exists __section(".data"); +bool slc_exists __section(".data") = false; +bool ioc_exists __section(".data") = false; static unsigned int __before_slc_op(const int op) { @@ -152,7 +152,7 @@ static void read_decode_cache_bcr_arcv2(void) sbcr.word = read_aux_reg(ARC_BCR_SLC); if (sbcr.fields.ver) { slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG); - slc_exists = 1; + slc_exists = true; slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64; } @@ -169,7 +169,7 @@ static void read_decode_cache_bcr_arcv2(void) cbcr.word = read_aux_reg(ARC_BCR_CLUSTER); if (cbcr.fields.c) - ioc_exists = 1; + ioc_exists = true; } #endif @@ -190,7 +190,7 @@ void read_decode_cache_bcr(void) ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD); if (ibcr.fields.ver) { - icache_exists = 1; + icache_exists = true; l1_line_sz = ic_line_sz = 8 << ibcr.fields.line_len; if (!ic_line_sz) panic("Instruction exists but line length is 0\n"); @@ -198,7 +198,7 @@ void read_decode_cache_bcr(void) dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD); if (dbcr.fields.ver){ - dcache_exists = 1; + dcache_exists = true; l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len; if (!dc_line_sz) panic("Data cache exists but line length is 0\n"); -- cgit