From f4dac3e16c1a08eb087e711a7e0ada3cf390d7ea Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Sat, 3 Sep 2011 21:29:59 -0400 Subject: omap3:clock: configure GFX clock to 200MHz for AM/DM37x AM/DM37x is another OMAP3 variant, where the GFX clock has been boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change. HW Errata: Due to dependency of TV out clock of 54MHz, it is not possible to configure GFX to 192MHz. So as per HW errats, the recommended GFX clock is 200MHz (=CORE_CLK/2). Signed-off-by: Vaibhav Hiremath Signed-off-by: Sandeep Paulraj --- arch/arm/cpu/armv7/omap3/clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv7/omap3/clock.c') diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c index 3d38d08ccb..29ff7131de 100644 --- a/arch/arm/cpu/armv7/omap3/clock.c +++ b/arch/arm/cpu/armv7/omap3/clock.c @@ -399,7 +399,7 @@ static void dpll3_init_36xx(u32 sil_index, u32 clk_index) /* L3 */ sr32(&prcm_base->clksel_core, 0, 2, CORE_L3_DIV); /* GFX */ - sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV); + sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV_36X); /* RESET MGR */ sr32(&prcm_base->clksel_wkup, 1, 2, WKUP_RSM); /* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */ -- cgit