From 5894ca007d217a2fa845facfbb62c6512396a145 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 3 Oct 2014 19:21:06 +0900 Subject: ARM: UniPhier: add UniPhier SoC support code These are used by Panasonic UniPhier SoC family. Signed-off-by: Masahiro Yamada --- arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c (limited to 'arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c') diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c b/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c new file mode 100644 index 0000000000..18965a94c5 --- /dev/null +++ b/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2011-2014 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void clkrst_init(void) +{ + u32 tmp; + + /* deassert reset */ + tmp = readl(SC_RSTCTRL); + tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1 + | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND; + writel(tmp, SC_RSTCTRL); + readl(SC_RSTCTRL); /* dummy read */ + + /* privide clocks */ + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC + | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI; + writel(tmp, SC_CLKCTRL); + readl(SC_CLKCTRL); /* dummy read */ +} -- cgit