From 8281c58fd46d095e28e60b2fb0ce84b4444896f8 Mon Sep 17 00:00:00 2001
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Date: Mon, 26 Oct 2015 19:47:51 +0800
Subject: armv8/fsl_lsch2: Add fsl_lsch2 SoC

Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/README.lsch2 | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/README.lsch2

(limited to 'arch/arm/cpu/armv8/fsl-layerscape/README.lsch2')

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/README.lsch2 b/arch/arm/cpu/armv8/fsl-layerscape/README.lsch2
new file mode 100644
index 0000000000..a6ef830069
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/README.lsch2
@@ -0,0 +1,10 @@
+#
+# Copyright 2015 Freescale Semiconductor
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+Freescale LayerScape with Chassis Generation 2
+
+This architecture supports Freescale ARMv8 SoCs with Chassis generation 2,
+for example LS1043A.
-- 
cgit