From 61ab8aac608a35d814b1b4e17712475ebeb20ccb Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 26 Jun 2018 14:26:02 -0700 Subject: armv8: layerscape: Enabled I-cache for SPL boot Enable I-cache for SPL boot to boost performance. Earlier MMU was enabled only for LS2080A and has since been dropped by commit f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build"). Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/cpu/armv8/fsl-layerscape') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index dba4b40607..f1d6fd63b9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -52,6 +52,7 @@ void spl_board_init(void) void board_init_f(ulong dummy) { + icache_enable(); /* Clear global data */ memset((void *)gd, 0, sizeof(gd_t)); board_early_init_f(); -- cgit From ed167eb1c75817345184ea85d08cc75d27604145 Mon Sep 17 00:00:00 2001 From: Yuantian Tang Date: Fri, 13 Jul 2018 17:25:28 +0800 Subject: armv8: fsl: remove sata support Remove the old implementation in order to enable DM for sata. Signed-off-by: Tang Yuantian Reviewed-by: Simon Glass Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 54 --------------------------------- 1 file changed, 54 deletions(-) (limited to 'arch/arm/cpu/armv8/fsl-layerscape') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index bfd663942a..8028d5228f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -6,8 +6,6 @@ #include #include #include -#include -#include #include #include #include @@ -330,36 +328,6 @@ void fsl_lsch3_early_init_f(void) #endif } -#ifdef CONFIG_SCSI_AHCI_PLAT -int sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci; - -#ifdef CONFIG_SYS_SATA2 - ccsr_ahci = (void *)CONFIG_SYS_SATA2; - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); -#endif - -#ifdef CONFIG_SYS_SATA1 - ccsr_ahci = (void *)CONFIG_SYS_SATA1; - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); - - ahci_init((void __iomem *)CONFIG_SYS_SATA1); - scsi_scan(false); -#endif - - return 0; -} -#endif - /* Get VDD in the unit mV from voltage ID */ int get_core_volt_from_fuse(void) { @@ -400,25 +368,6 @@ int get_core_volt_from_fuse(void) } #elif defined(CONFIG_FSL_LSCH2) -#ifdef CONFIG_SCSI_AHCI_PLAT -int sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA; - - /* Disable SATA ECC */ - out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000); - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); - - ahci_init((void __iomem *)CONFIG_SYS_SATA); - scsi_scan(false); - - return 0; -} -#endif static void erratum_a009929(void) { @@ -719,9 +668,6 @@ int qspi_ahb_init(void) #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { -#ifdef CONFIG_SCSI_AHCI_PLAT - sata_init(); -#endif #ifdef CONFIG_CHAIN_OF_TRUST fsl_setenv_chain_of_trust(); #endif -- cgit From 996060927540904b956513d087192f67b6419133 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 26 Jun 2018 14:48:28 -0700 Subject: armv8: layerscape: spl: Initialize QSPI AHB for QSPI boot To get full access of QSPI space, initialize AHB interface. Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/cpu/armv8/fsl-layerscape') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index f1d6fd63b9..3bb6e5b3db 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -11,6 +11,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -102,6 +103,9 @@ void board_init_f(ulong dummy) gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1); gd->arch.tlb_allocated = gd->arch.tlb_addr; #endif /* CONFIG_SPL_FSL_LS_PPA */ +#if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT) + qspi_ahb_init(); +#endif } #ifdef CONFIG_SPL_OS_BOOT -- cgit From 038b965c2b403c8087ca0515f907b730be57d739 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 26 Jun 2018 14:48:29 -0700 Subject: armv8: ls1046ardb: Add falcon mode for for QSPI boot A new defconfig is introduced to support SPL boot from QSPI NOR flash. This is to support falcon mode for faster booting into Linux. Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon | 10 ++++++++++ arch/arm/cpu/armv8/fsl-layerscape/spl.c | 3 +++ 2 files changed, 13 insertions(+) (limited to 'arch/arm/cpu/armv8/fsl-layerscape') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon index a00b5bc9c3..7dae9f03c3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon @@ -129,6 +129,16 @@ Example: The "loadables" is not optional. It tells SPL which images to load into memory. +Falcon mode with QSPI boot +-------------------------- +To use falcon mode with QSPI boot, SPL needs to be enabled. Similar to SD or +NAND boot, a RAM version full feature U-Boot is needed. Unlike SD or NAND boot, +SPL with QSPI doesn't need to combine SPL image with RAM version image. Two +separated images are used, u-boot-spl.pbl and u-boot.img. The former is SPL +image with RCW and PBI commands to load the SPL payload into On-Chip RAM. The +latter is RAM version U-Boot in FIT format (or legacy format if FIT is not +used). + Other things to consider ----------------------- Falcon boot skips a lot of initialization in U-Boot. If Linux expects the diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 3bb6e5b3db..3e53084b21 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -22,6 +22,9 @@ u32 spl_boot_device(void) #endif #ifdef CONFIG_SPL_NAND_SUPPORT return BOOT_DEVICE_NAND; +#endif +#ifdef CONFIG_QSPI_BOOT + return BOOT_DEVICE_NOR; #endif return 0; } -- cgit