From 2db53cfe9601288d8b1c1dfb153afc644a954872 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Fri, 10 Nov 2017 11:32:52 +0530 Subject: armv8: fsl-layerscape: Add support of disabling core prefetch Instruction prefetch feature is by default enabled during core release. This patch add support of disabling instruction prefetch by setting core mask in PPA. Here each core mask bit represents a core and prefetch is disabled at the time of core release. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 38 ++++++++++++++++++++++ .../armv8/fsl-layerscape/doc/README.core_prefetch | 20 ++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/doc/README.core_prefetch (limited to 'arch/arm/cpu/armv8/fsl-layerscape') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index ab5d76ea3b..d08262971e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -29,6 +29,7 @@ #include #endif #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -494,6 +495,41 @@ static inline int check_psci(void) return 0; } +static void config_core_prefetch(void) +{ + char *buf = NULL; + char buffer[HWCONFIG_BUFFER_SIZE]; + const char *prefetch_arg = NULL; + size_t arglen; + unsigned int mask; + struct pt_regs regs; + + if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0) + buf = buffer; + + prefetch_arg = hwconfig_subarg_f("core_prefetch", "disable", + &arglen, buf); + + if (prefetch_arg) { + mask = simple_strtoul(prefetch_arg, NULL, 0) & 0xff; + if (mask & 0x1) { + printf("Core0 prefetch can't be disabled\n"); + return; + } + +#define SIP_PREFETCH_DISABLE_64 0xC200FF13 + regs.regs[0] = SIP_PREFETCH_DISABLE_64; + regs.regs[1] = mask; + smc_call(®s); + + if (regs.regs[0]) + printf("Prefetch disable config failed for mask "); + else + printf("Prefetch disable config passed for mask "); + printf("0x%x\n", mask); + } +} + int arch_early_init_r(void) { #ifdef CONFIG_SYS_FSL_ERRATUM_A009635 @@ -521,6 +557,8 @@ int arch_early_init_r(void) fsl_rgmii_init(); #endif + config_core_prefetch(); + #ifdef CONFIG_SYS_HAS_SERDES fsl_serdes_init(); #endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.core_prefetch b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.core_prefetch new file mode 100644 index 0000000000..85cf6abd6d --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.core_prefetch @@ -0,0 +1,20 @@ +Core instruction prefetch disable +--------------------------------- +To disable instruction prefetch of core; hwconfig needs to be updated. +for e.g. +setenv hwconfig 'fsl_ddr:bank_intlv=auto;core_prefetch:disable=0x02' + +Here 0x02 can be replaced with any valid value except Mask[0] bit. It +represents 64 bit mask. The 64-bit Mask has one bit for each core. +Mask[0] = core0 +Mask[1] = core1 +Mask[2] = core2 +etc +If the bit is set ('b1) in the mask, then prefetch is disabled for +that core when it is released from reset. + +core0 prefetch should not be disabled i.e. Mask[0] should never be set. +Setting Mask[0] may lead to undefined behavior. + +Once disabled, prefetch remains disabled until the next reset. +There is no function to re-enable prefetch. -- cgit From 819163c44e51e604d43ea7e0474b5e106c7ac088 Mon Sep 17 00:00:00 2001 From: Ran Wang Date: Mon, 13 Nov 2017 16:14:48 +0800 Subject: armv8: Workaround for USB erratua on LS1012A This is suplement for patch which handle below errata: A-009007, A-009008, A-008997, A-009798 Signed-off-by: Ran Wang Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++ arch/arm/cpu/armv8/fsl-layerscape/soc.c | 27 ++++++++++++++++++++------- 2 files changed, 24 insertions(+), 7 deletions(-) (limited to 'arch/arm/cpu/armv8/fsl-layerscape') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5daf79e919..4866550c0d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -5,6 +5,10 @@ config ARCH_LS1012A select SYS_FSL_DDR_BE select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 + select SYS_FSL_ERRATUM_A009798 + select SYS_FSL_ERRATUM_A008997 + select SYS_FSL_ERRATUM_A009007 + select SYS_FSL_ERRATUM_A009008 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 497a4b541d..ae57c0e31d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -66,10 +66,13 @@ static void erratum_a009008(void) #ifdef CONFIG_SYS_FSL_ERRATUM_A009008 u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; -#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \ + defined(CONFIG_ARCH_LS1012A) set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB1); +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB2); set_usb_txvreftune(scfg, SCFG_USB3PRM1CR_USB3); +#endif #elif defined(CONFIG_ARCH_LS2080A) set_usb_txvreftune(scfg, SCFG_USB3PRM1CR); #endif @@ -87,17 +90,21 @@ static void erratum_a009798(void) #ifdef CONFIG_SYS_FSL_ERRATUM_A009798 u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; -#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \ + defined(CONFIG_ARCH_LS1012A) set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR_USB1); +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR_USB2); set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR_USB3); +#endif #elif defined(CONFIG_ARCH_LS2080A) set_usb_sqrxtune(scfg, SCFG_USB3PRM1CR); #endif #endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */ } -#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \ + defined(CONFIG_ARCH_LS1012A) static inline void set_usb_pcstxswingfull(u32 __iomem *scfg, u32 offset) { scfg_clrsetbits32(scfg + offset / 4, @@ -109,17 +116,21 @@ static inline void set_usb_pcstxswingfull(u32 __iomem *scfg, u32 offset) static void erratum_a008997(void) { #ifdef CONFIG_SYS_FSL_ERRATUM_A008997 -#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \ + defined(CONFIG_ARCH_LS1012A) u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB1); +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB2); set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB3); #endif +#endif #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */ } -#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \ + defined(CONFIG_ARCH_LS1012A) #define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \ out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \ @@ -139,16 +150,18 @@ static void erratum_a008997(void) static void erratum_a009007(void) { -#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) || \ + defined(CONFIG_ARCH_LS1012A) void __iomem *usb_phy = (void __iomem *)SCFG_USB_PHY1; PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy); - +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) usb_phy = (void __iomem *)SCFG_USB_PHY2; PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy); usb_phy = (void __iomem *)SCFG_USB_PHY3; PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy); +#endif #elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) void __iomem *dcsr = (void __iomem *)DCSR_BASE; -- cgit From 30c41d2191e9d726e3677c8af969f76d7669262c Mon Sep 17 00:00:00 2001 From: Udit Agarwal Date: Wed, 22 Nov 2017 09:01:26 +0530 Subject: armv8: LS1088A_QSPI: SECURE_BOOT: Images validation Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal Signed-off-by: Vinitha Pillai-B57223 Signed-off-by: Sumit Garg Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/cpu/armv8/fsl-layerscape') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 4866550c0d..5a75920400 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -248,6 +248,7 @@ config SYS_LS_PPA_ESBC_ADDR default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A + default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A default 0x680000 if SYS_LS_PPA_FW_IN_MMC default 0x680000 if SYS_LS_PPA_FW_IN_NAND help -- cgit