From 7558000721076fb988e46c11edfed64ee33a4e0f Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 10 Jun 2015 15:50:56 +0530 Subject: zynqmp: Kconfig: Move zynqmp Kconfig Move the zynqmp Kconfig from board to arch as there may be different boards under same architecture. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/cpu/armv8/zynqmp/Kconfig | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 arch/arm/cpu/armv8/zynqmp/Kconfig (limited to 'arch/arm/cpu/armv8/zynqmp') diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig new file mode 100644 index 0000000000..b07932e805 --- /dev/null +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -0,0 +1,15 @@ +if TARGET_XILINX_ZYNQMP + +config SYS_BOARD + default "zynqmp" + +config SYS_VENDOR + default "xilinx" + +config SYS_SOC + default "zynqmp" + +config SYS_CONFIG_NAME + default "xilinx_zynqmp" + +endif -- cgit From 0b54a9dd09b8a06a1923c3f62f940626b062ccf7 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 10 Jun 2015 15:50:57 +0530 Subject: zynqmp: Define ep config for ZynqMP Define a new config "zynqmp_ep" for ZynqMP instead of xilinx_zynqmp. This defconfig supports all emulation platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP to ARCH_ZYNQMP. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/cpu/armv8/zynqmp/Kconfig | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'arch/arm/cpu/armv8/zynqmp') diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig index b07932e805..c8fcfb6abb 100644 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -1,4 +1,12 @@ -if TARGET_XILINX_ZYNQMP +if ARCH_ZYNQMP + +choice + prompt "Xilinx ZynqMP board select" + +config TARGET_ZYNQMP_EP + bool "ZynqMP EP Board" + +endchoice config SYS_BOARD default "zynqmp" @@ -10,6 +18,6 @@ config SYS_SOC default "zynqmp" config SYS_CONFIG_NAME - default "xilinx_zynqmp" + default "xilinx_zynqmp_ep" if TARGET_ZYNQMP_EP endif -- cgit From fb101168faef4dcc46243b38429193bc7c416885 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 22 May 2015 13:26:33 +0200 Subject: zynqmp: mp: Simplify set_r5_start handling Pass directly boot_addr which is LOVEC (0) or HIVEC (0xffff0000). No reason to use magic values 0 and 1. Signed-off-by: Michal Simek --- arch/arm/cpu/armv8/zynqmp/mp.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'arch/arm/cpu/armv8/zynqmp') diff --git a/arch/arm/cpu/armv8/zynqmp/mp.c b/arch/arm/cpu/armv8/zynqmp/mp.c index 17e32a7b7c..dcb80b522e 100644 --- a/arch/arm/cpu/armv8/zynqmp/mp.c +++ b/arch/arm/cpu/armv8/zynqmp/mp.c @@ -216,12 +216,7 @@ int cpu_release(int nr, int argc, char * const argv[]) printf("R5 lockstep mode\n"); set_r5_tcm_mode(LOCK); set_r5_halt_mode(HALT, LOCK); - - if (boot_addr == 0) - set_r5_start(0); - else - set_r5_start(1); - + set_r5_start(boot_addr); enable_clock_r5(); release_r5_reset(LOCK); set_r5_halt_mode(RELEASE, LOCK); -- cgit From 225bf9aa65ac2131b8e55fd81019d73c2c1c0586 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jul 2015 09:27:11 +0200 Subject: zynqmp: Add support for IP detection via SLCR SLCR can be used for IP configuration setting. Add SLCR skeleton to enable run time checking. Signed-off-by: Michal Simek --- arch/arm/cpu/armv8/zynqmp/Makefile | 1 + arch/arm/cpu/armv8/zynqmp/slcr.c | 63 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 64 insertions(+) create mode 100644 arch/arm/cpu/armv8/zynqmp/slcr.c (limited to 'arch/arm/cpu/armv8/zynqmp') diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile b/arch/arm/cpu/armv8/zynqmp/Makefile index efab5eabc9..d0ed2223ff 100644 --- a/arch/arm/cpu/armv8/zynqmp/Makefile +++ b/arch/arm/cpu/armv8/zynqmp/Makefile @@ -8,3 +8,4 @@ obj-y += clk.o obj-y += cpu.o obj-$(CONFIG_MP) += mp.o +obj-y += slcr.o diff --git a/arch/arm/cpu/armv8/zynqmp/slcr.c b/arch/arm/cpu/armv8/zynqmp/slcr.c new file mode 100644 index 0000000000..713e9a62c0 --- /dev/null +++ b/arch/arm/cpu/armv8/zynqmp/slcr.c @@ -0,0 +1,63 @@ +/* + * (C) Copyright 2014 - 2015 Xilinx, Inc. + * Michal Simek + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +/* + * zynq_slcr_mio_get_status - Get the status of MIO peripheral. + * + * @peri_name: Name of the peripheral for checking MIO status + * @get_pins: Pointer to array of get pin for this peripheral + * @num_pins: Number of pins for this peripheral + * @mask: Mask value + * @check_val: Required check value to get the status of periph + */ +struct zynq_slcr_mio_get_status { + const char *peri_name; + const int *get_pins; + int num_pins; + u32 mask; + u32 check_val; +}; + +static const struct zynq_slcr_mio_get_status mio_periphs[] = { +}; + +/* + * zynq_slcr_get_mio_pin_status - Get the MIO pin status of peripheral. + * + * @periph: Name of the peripheral + * + * Returns count to indicate the number of pins configured for the + * given @periph. + */ +int zynq_slcr_get_mio_pin_status(const char *periph) +{ + const struct zynq_slcr_mio_get_status *mio_ptr; + int val, i, j; + int mio = 0; + + for (i = 0; i < ARRAY_SIZE(mio_periphs); i++) { + if (strcmp(periph, mio_periphs[i].peri_name) == 0) { + mio_ptr = &mio_periphs[i]; + for (j = 0; j < mio_ptr->num_pins; j++) { + val = readl(&slcr_base->mio_pin + [mio_ptr->get_pins[j]]); + if ((val & mio_ptr->mask) == mio_ptr->check_val) + mio++; + } + break; + } + } + + return mio; +} -- cgit