From 6e96cf9a812757d98dc9504648d3c39d5f2768f4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 20 Oct 2010 19:36:39 +0200 Subject: PXA: Implement ELF relocation Based on patch by: Albert Aribaud Signed-off-by: Marek Vasut --- arch/arm/cpu/pxa/start.S | 129 ++++++++++++++++++++++---------------------- arch/arm/cpu/pxa/u-boot.lds | 19 +++---- 2 files changed, 72 insertions(+), 76 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 684e44e838..96bfb54841 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -8,6 +8,7 @@ * Copyright (C) 2002 Kyle Harris * Copyright (C) 2003 Robert Schwebel * Copyright (C) 2003 Kai-Uwe Bloem + * Copyright (c) 2010 Marek Vasut * * See file CREDITS for list of people who contributed to this * project. @@ -94,20 +95,16 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -.globl _armboot_start -_armboot_start: - .word _start - /* * These are defined in the board-specific linker script. */ -.globl _bss_start -_bss_start: - .word __bss_start +.globl _bss_start_ofs +_bss_start_ofs: + .word __bss_start - _start -.globl _bss_end -_bss_end: - .word _end +.globl _bss_end_ofs +_bss_end_ofs: + .word _end - _start #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ @@ -127,30 +124,6 @@ FIQ_STACK_START: IRQ_STACK_START_IN: .word 0x0badc0de -.globl _datarel_start -_datarel_start: - .word __datarel_start - -.globl _datarelrolocal_start -_datarelrolocal_start: - .word __datarelrolocal_start - -.globl _datarellocal_start -_datarellocal_start: - .word __datarellocal_start - -.globl _datarelro_start -_datarelro_start: - .word __datarelro_start - -.globl _got_start -_got_start: - .word __got_start - -.globl _got_end -_got_end: - .word __got_end - /* * the actual reset code */ @@ -272,9 +245,8 @@ stack_setup: adr r0, _start ldr r2, _TEXT_BASE - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ + ldr r3, _bss_start_ofs + add r2, r0, r3 /* r2 <- source end address */ cmp r0, r6 beq clear_bss @@ -288,36 +260,54 @@ copy_loop: ldmfd sp!, {r0-r12} #ifndef CONFIG_PRELOADER - /* fix got entries */ - ldr r1, _TEXT_BASE /* Text base */ - mov r0, r7 /* reloc addr */ - ldr r2, _got_start /* addr in Flash */ - ldr r3, _got_end /* addr in Flash */ - sub r3, r3, r1 - add r3, r3, r0 - sub r2, r2, r1 - add r2, r2, r0 - + /* + * fix .rel.dyn relocations + */ + ldr r0, _TEXT_BASE /* r0 <- Text base */ + sub r9, r7, r0 /* r9 <- relocation offset */ + ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ + add r10, r10, r0 /* r10 <- sym table in FLASH */ + ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ + add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ + ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ + add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ fixloop: - ldr r4, [r2] - sub r4, r4, r1 - add r4, r4, r0 - str r4, [r2] - add r2, r2, #4 + ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ + add r0, r9 /* r0 <- location to fix up in RAM */ + ldr r1, [r2, #4] + and r8, r1, #0xff + cmp r8, #23 /* relative fixup? */ + beq fixrel + cmp r8, #2 /* absolute fixup? */ + beq fixabs + /* ignore unknown type of fixup */ + b fixnext +fixabs: + /* absolute fix: set location to (offset) symbol value */ + mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ + add r1, r10, r1 /* r1 <- address of symbol in table */ + ldr r1, [r1, #4] /* r1 <- symbol value */ + add r1, r9 /* r1 <- relocated sym addr */ + b fixnext +fixrel: + /* relative fix: increase location by offset */ + ldr r1, [r0] + add r1, r1, r9 +fixnext: + str r1, [r0] + add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER - ldr r0, _bss_start - ldr r1, _bss_end + ldr r0, _bss_start_ofs + ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ mov r4, r7 /* reloc addr */ - sub r0, r0, r3 add r0, r0, r4 - sub r1, r1, r3 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -332,24 +322,33 @@ clbss_l:str r2, [r0] /* clear loop... */ * initialization, now running from RAM. */ #ifdef CONFIG_ONENAND_IPL - ldr pc, _start_oneboot + ldr r0, _start_oneboot_ofs + mov pc, r0 -_start_oneboot: .word start_oneboot +_start_oneboot_ofs + : .word start_oneboot #else - ldr r0, _TEXT_BASE - ldr r2, _board_init_r - sub r2, r2, r0 - add r2, r2, r7 /* position from board_init_r in RAM */ + ldr r0, _board_init_r_ofs + adr r1, _start + add r0, r0, r1 + add lr, r0, r9 /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ /* jump to it ... */ - mov lr, r2 mov pc, lr -_board_init_r: .word board_init_r +_board_init_r_ofs: + .word board_init_r - _start #endif +_rel_dyn_start_ofs: + .word __rel_dyn_start - _start +_rel_dyn_end_ofs: + .word __rel_dyn_end - _start +_dynsym_start_ofs: + .word __dynsym_start - _start + #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ /****************************************************************************/ diff --git a/arch/arm/cpu/pxa/u-boot.lds b/arch/arm/cpu/pxa/u-boot.lds index 74a4c6e90c..d6643f9529 100644 --- a/arch/arm/cpu/pxa/u-boot.lds +++ b/arch/arm/cpu/pxa/u-boot.lds @@ -41,21 +41,18 @@ SECTIONS . = ALIGN(4); .data : { *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) } - __got_start = .; . = ALIGN(4); - .got : { *(.got) } + __rel_dyn_start = .; + .rel.dyn : { *(.rel.dyn) } + __rel_dyn_end = .; + + __dynsym_start = .; + .dynsym : { *(.dynsym) } + + . = ALIGN(4); - __got_end = .; . = .; __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } -- cgit From 4abf2f7a23204dc4e10f0926609b89dfa7ab4394 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 20 Oct 2010 20:09:09 +0200 Subject: PXA: Use pxa-regs.h register definitions in start.S Signed-off-by: Marek Vasut --- arch/arm/cpu/pxa/start.S | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 96bfb54841..3c5bd84e36 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -566,13 +566,7 @@ fiq: /* */ /****************************************************************************/ /* Operating System Timer */ -OSTIMER_BASE: .word 0x40a00000 -#define OSMR3 0x0C -#define OSCR 0x10 -#define OWER 0x18 -#define OIER 0x1C - - .align 5 +.align 5 .globl reset_cpu /* FIXME: this code is PXA250 specific. How is this handled on */ @@ -582,18 +576,20 @@ reset_cpu: /* We set OWE:WME (watchdog enable) and wait until timeout happens */ - ldr r0, OSTIMER_BASE - ldr r1, [r0, #OWER] + ldr r0, =OWER + ldr r1, [r0] orr r1, r1, #0x0001 /* bit0: WME */ - str r1, [r0, #OWER] + str r1, [r0] /* OS timer does only wrap every 1165 seconds, so we have to set */ /* the match register as well. */ - ldr r1, [r0, #OSCR] /* read OS timer */ + ldr r0, =OSCR + ldr r1, [r0] /* read OS timer */ add r1, r1, #0x800 /* let OSMR3 match after */ add r1, r1, #0x800 /* 4096*(1/3.6864MHz)=1ms */ - str r1, [r0, #OSMR3] + ldr r0, =OSMR3 + str r1, [r0] reset_endless: -- cgit From 8c0c2b905078b9733a3830f108dca7bfab41d369 Mon Sep 17 00:00:00 2001 From: Gray Remlin Date: Sun, 24 Oct 2010 16:18:31 +0100 Subject: ARM: Use consistent assembler syntax Signed-off-by: Gray Remlin Acked-by: Heiko Schocher --- arch/arm/cpu/arm1136/start.S | 10 +++++----- arch/arm/cpu/arm926ejs/start.S | 10 +++++----- arch/arm/cpu/armv7/start.S | 10 +++++----- 3 files changed, 15 insertions(+), 15 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 29ed065c01..1d4637d506 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -237,13 +237,13 @@ copy_loop: ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ fixloop: - ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ - add r0, r9 /* r0 <- location to fix up in RAM */ + ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ + add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + cmp r8, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r8, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext @@ -260,7 +260,7 @@ fixrel: add r1, r1, r9 fixnext: str r1, [r0] - add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ + add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 ble fixloop #endif diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 863de3ba0f..e1c1508fb3 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -225,13 +225,13 @@ copy_loop: ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ fixloop: - ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ - add r0, r9 /* r0 <- location to fix up in RAM */ + ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ + add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + cmp r8, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r8, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext @@ -248,7 +248,7 @@ fixrel: add r1, r1, r9 fixnext: str r1, [r0] - add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ + add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop #endif diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 64c86e9769..ef6c32d137 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -224,13 +224,13 @@ copy_loop: ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ fixloop: - ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ - add r0, r9 /* r0 <- location to fix up in RAM */ + ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ + add r0, r0, r9 /* r0 <- location to fix up in RAM */ ldr r1, [r2, #4] and r8, r1, #0xff - cmp r8, #23 /* relative fixup? */ + cmp r8, #23 /* relative fixup? */ beq fixrel - cmp r8, #2 /* absolute fixup? */ + cmp r8, #2 /* absolute fixup? */ beq fixabs /* ignore unknown type of fixup */ b fixnext @@ -247,7 +247,7 @@ fixrel: add r1, r1, r9 fixnext: str r1, [r0] - add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ + add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop -- cgit From 25ddd1fb0a2281b182529afbc8fda5de2dc16d96 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 26 Oct 2010 14:34:52 +0200 Subject: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk Acked-by: Kumar Gala --- arch/arm/cpu/arm1136/start.S | 9 +++++---- arch/arm/cpu/arm1176/start.S | 9 +++++---- arch/arm/cpu/arm720t/start.S | 8 ++++---- arch/arm/cpu/arm920t/start.S | 7 ++++--- arch/arm/cpu/arm925t/start.S | 8 ++++---- arch/arm/cpu/arm926ejs/start.S | 8 ++++---- arch/arm/cpu/arm946es/start.S | 8 ++++---- arch/arm/cpu/arm_intcm/start.S | 8 ++++---- arch/arm/cpu/armv7/start.S | 9 +++++---- arch/arm/cpu/ixp/start.S | 7 ++++--- arch/arm/cpu/lh7a40x/start.S | 9 ++++----- arch/arm/cpu/pxa/start.S | 5 +++-- arch/arm/cpu/s3c44b0/start.S | 5 ++--- arch/arm/cpu/sa1100/start.S | 9 ++++----- 14 files changed, 56 insertions(+), 53 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 1d4637d506..07d0c859cb 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -28,6 +28,7 @@ * MA 02111-1307 USA */ +#include #include #include .globl _start @@ -380,7 +381,7 @@ stack_setup: sub sp, r0, #128 /* leave 32 words for abort-stack */ #else sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -510,7 +511,7 @@ cpu_init_crit: #else adr r2, _start sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #endif ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -547,7 +548,7 @@ cpu_init_crit: #else adr r13, _start @ setup our mode stack (enter in banked mode) sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack #endif str lr, [r13] @ save caller lr in position 0 of saved stack @@ -569,7 +570,7 @@ cpu_init_crit: #else ldr r0, _armboot_start @ get data regions start sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack + sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack #endif str lr, [r0] @ save caller lr in position 0 of saved stack mrs r0, spsr @ get the spsr diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 24e5bf4fff..c13ccebf89 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -30,6 +30,7 @@ * Base codes by scsuh (sc.suh) */ +#include #include #include #ifdef CONFIG_ENABLE_MMU @@ -546,7 +547,7 @@ skip_hw_init: stack_setup: ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ sub sp, r0, #12 /* leave 3 words for abort-stack */ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ @@ -663,7 +664,7 @@ phy_last_jump: ldr r2, _armboot_start sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) /* set base 2 words into abort stack */ - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) #else ldr r2, IRQ_STACK_START_IN #endif @@ -687,7 +688,7 @@ phy_last_jump: /* move past malloc pool */ sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) /* move to reserved a couple spots for abort stack */ - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8) + sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif @@ -721,7 +722,7 @@ phy_last_jump: /* move past malloc pool */ sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) /* move past gbl and a couple spots for abort stack */ - sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8) + sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index d93911f566..06aa3a25d4 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -23,7 +23,7 @@ * MA 02111-1307 USA */ - +#include #include #include #include @@ -327,7 +327,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -609,7 +609,7 @@ lock_loop: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -646,7 +646,7 @@ lock_loop: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 343a760df4..84f754677f 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -24,6 +24,7 @@ * MA 02111-1307 USA */ +#include #include #include @@ -414,7 +415,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -529,7 +530,7 @@ cpu_init_crit: sub r2, r2, #(CONFIG_STACKSIZE) sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) /* set base 2 words into abort stack */ - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) #else ldr r2, IRQ_STACK_START_IN #endif @@ -569,7 +570,7 @@ cpu_init_crit: sub r13, r13, #(CONFIG_STACKSIZE) sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) /* reserve a couple spots in abort stack */ - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index cf18a01664..f45ad891bc 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -30,7 +30,7 @@ * MA 02111-1307 USA */ - +#include #include #include @@ -385,7 +385,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -492,7 +492,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -529,7 +529,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN #endif diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index e1c1508fb3..69e1a33174 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -31,7 +31,7 @@ * MA 02111-1307 USA */ - +#include #include #include #include @@ -349,7 +349,7 @@ stack_setup: sub sp, r0, #128 /* leave 32 words for abort-stack */ #ifndef CONFIG_PRELOADER sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -475,7 +475,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) adr r2, _start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -513,7 +513,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) adr r13, _start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 077886f36f..25b573bcdf 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -30,7 +30,7 @@ * MA 02111-1307 USA */ - +#include #include #include @@ -316,7 +316,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -427,7 +427,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -465,7 +465,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 07356cb5fd..3e9d5e8c93 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -30,7 +30,7 @@ * MA 02111-1307 USA */ - +#include #include #include @@ -312,7 +312,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -403,7 +403,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -441,7 +441,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index ef6c32d137..b9eb0c9b58 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -29,6 +29,7 @@ * MA 02111-1307 USA */ +#include #include #include @@ -357,7 +358,7 @@ copy_loop: @ copy 32 bytes at a time stack_setup: ldr r0, _TEXT_BASE @ upper 128 KiB: relocated uboot sub r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE @ bdinfo + sub r0, r0, #GENERATED_GBL_DATA_SIZE @ bdinfo #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ) #endif @@ -464,7 +465,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE + 8) @ set base 2 words into abort + sub r2, r2, #(GENERATED_GBL_DATA_SIZE + 8) @ set base 2 words into abort #else ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort @ stack @@ -507,7 +508,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack (enter sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8) @ move to reserved a couple + sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) @ move to reserved a couple #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter @ in banked mode) @@ -535,7 +536,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r0, _armboot_start @ get data regions start sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8) @ move past gbl and a couple + sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) @ move past gbl and a couple #else ldr r0, IRQ_STACK_START_IN @ get data regions start @ spots for abort stack diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 836c33ba8b..2931ccd616 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -27,6 +27,7 @@ * MA 02111-1307 USA */ +#include #include #include #include @@ -555,7 +556,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -620,7 +621,7 @@ _start_armboot: .word start_armboot #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -661,7 +662,7 @@ _start_armboot: .word start_armboot #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index d944860fca..703baf89a2 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -24,11 +24,10 @@ * MA 02111-1307 USA */ - +#include #include #include - /* ************************************************************************* * @@ -349,7 +348,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -464,7 +463,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -501,7 +500,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 3c5bd84e36..b8065b70df 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -29,6 +29,7 @@ * MA 02111-1307 USA */ +#include #include #include #include @@ -419,7 +420,7 @@ reset: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -460,7 +461,7 @@ reset: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 20091b24c0..77f3735e54 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -27,11 +27,10 @@ * MA 02111-1307 USA */ - +#include #include #include - /* * Jump vector table */ @@ -331,7 +330,7 @@ vector_copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 8eabb66cab..5635e0a30f 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -25,11 +25,10 @@ * MA 02111-1307 USA */ - +#include #include #include - /* ************************************************************************* * @@ -301,7 +300,7 @@ copy_loop: stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ + sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif @@ -445,7 +444,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, _armboot_start sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack + sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack #else ldr r2, IRQ_STACK_START_IN #endif @@ -482,7 +481,7 @@ cpu_init_crit: #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack + sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack #else ldr r13, IRQ_STACK_START_IN @ setup our mode stack #endif -- cgit From 123fb7deb238cf9d03e82f98962ed7f03d09703a Mon Sep 17 00:00:00 2001 From: Darius Augulis Date: Mon, 25 Oct 2010 13:45:35 +0300 Subject: ARM: fix address setup in start.S Fix address setup bug for ARM. This bug stops u-boot booting if CONFIG_SKIP_RELOCATE_UBOOT is defined. Signed-off-by: Darius Augulis --- arch/arm/cpu/arm1136/start.S | 6 ++++-- arch/arm/cpu/arm926ejs/start.S | 6 ++++-- arch/arm/cpu/armv7/start.S | 6 ++++-- arch/arm/cpu/pxa/start.S | 6 ++++-- 4 files changed, 16 insertions(+), 8 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 07d0c859cb..e3e646ca61 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -297,8 +297,10 @@ _nand_boot_ofs jump_2_ram: ldr r0, _board_init_r_ofs adr r1, _start - add r0, r0, r1 - add lr, r0, r9 + add lr, r0, r1 +#ifndef CONFIG_SKIP_RELOCATE_UBOOT + add lr, lr, r9 +#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 69e1a33174..7397882b59 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -286,8 +286,10 @@ _nand_boot_ofs: #else ldr r0, _board_init_r_ofs adr r1, _start - add r0, r0, r1 - add lr, r0, r9 + add lr, r0, r1 +#ifndef CONFIG_SKIP_RELOCATE_UBOOT + add lr, lr, r9 +#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index b9eb0c9b58..bdf2fad380 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -275,8 +275,10 @@ clbss_l:str r2, [r0] /* clear loop... */ jump_2_ram: ldr r0, _board_init_r_ofs adr r1, _start - add r0, r0, r1 - add lr, r0, r9 + add lr, r0, r1 +#ifndef CONFIG_SKIP_RELOCATE_UBOOT + add lr, lr, r9 +#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index b8065b70df..bf8510eb76 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -331,8 +331,10 @@ _start_oneboot_ofs #else ldr r0, _board_init_r_ofs adr r1, _start - add r0, r0, r1 - add lr, r0, r9 + add lr, r0, r1 +#ifndef CONFIG_SKIP_RELOCATE_UBOOT + add lr, lr, r9 +#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ -- cgit From ea34c9d6ed0d66a16c0a2500bc3b6d8a596dbf29 Mon Sep 17 00:00:00 2001 From: Darius Augulis Date: Mon, 25 Oct 2010 13:48:03 +0300 Subject: arm1176: fix relocation Fix relocation code for arm1176, do it like other ARM CPU's are doing. Tested only with CONFIG_SKIP_RELOCATE_UBOOT defined and using nand_spl (booting from nand). Test done on s3c6410 based board (not yet supported in main line). Signed-off-by: Darius Augulis --- arch/arm/cpu/arm1176/start.S | 143 ++++++++++++++++++++++++---------------- arch/arm/cpu/arm1176/u-boot.lds | 15 ++++- 2 files changed, 97 insertions(+), 61 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index c13ccebf89..7f32db7874 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -116,44 +116,52 @@ _armboot_start: /* * These are defined in the board-specific linker script. + * Subtracting _start from them lets the linker put their + * relative position in the executable instead of leaving + * them null. */ -.globl _bss_start -_bss_start: - .word __bss_start -.globl _bss_end -_bss_end: - .word _end +.globl _bss_start_ofs +_bss_start_ofs: + .word __bss_start - _start -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -/* IRQ stack memory (calculated at run-time) + 8 bytes */ -.globl IRQ_STACK_START_IN -IRQ_STACK_START_IN: - .word 0x0badc0de +.globl _bss_end_ofs +_bss_end_ofs: + .word _end - _start -.globl _datarel_start -_datarel_start: - .word __datarel_start +.globl _datarel_start_ofs +_datarel_start_ofs: + .word __datarel_start - _start -.globl _datarelrolocal_start -_datarelrolocal_start: - .word __datarelrolocal_start +.globl _datarelrolocal_start_ofs +_datarelrolocal_start_ofs: + .word __datarelrolocal_start - _start -.globl _datarellocal_start -_datarellocal_start: - .word __datarellocal_start +.globl _datarellocal_start_ofs +_datarellocal_start_ofs: + .word __datarellocal_start - _start -.globl _datarelro_start -_datarelro_start: - .word __datarelro_start +.globl _datarelro_start_ofs +_datarelro_start_ofs: + .word __datarelro_start - _start -.globl _got_start -_got_start: - .word __got_start +.globl _rel_dyn_start_ofs +_rel_dyn_start_ofs: + .word __rel_dyn_start - _start -.globl _got_end -_got_end: - .word __got_end +.globl _rel_dyn_end_ofs +_rel_dyn_end_ofs: + .word __rel_dyn_end - _start + +.globl _dynsym_start_ofs +_dynsym_start_ofs: + .word __dynsym_start - _start + +#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) +/* IRQ stack memory (calculated at run-time) + 8 bytes */ +.globl IRQ_STACK_START_IN +IRQ_STACK_START_IN: + .word 0x0badc0de /* * the actual reset code @@ -275,9 +283,8 @@ stack_setup: adr r0, _start ldr r2, _TEXT_BASE - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ + ldr r3, _bss_start_ofs + add r2, r0, r3 /* r2 <- source end address */ cmp r0, r6 beq clear_bss @@ -289,24 +296,44 @@ copy_loop: blo copy_loop #ifndef CONFIG_PRELOADER - /* fix got entries */ - ldr r1, _TEXT_BASE /* Text base */ - mov r0, r7 /* reloc addr */ - ldr r2, _got_start /* addr in Flash */ - ldr r3, _got_end /* addr in Flash */ - sub r3, r3, r1 - add r3, r3, r0 - sub r2, r2, r1 - add r2, r2, r0 - + /* + * fix .rel.dyn relocations + */ + ldr r0, _TEXT_BASE /* r0 <- Text base */ + sub r9, r7, r0 /* r9 <- relocation offset */ + ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ + add r10, r10, r0 /* r10 <- sym table in FLASH */ + ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ + add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ + ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ + add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ fixloop: - ldr r4, [r2] - sub r4, r4, r1 - add r4, r4, r0 - str r4, [r2] - add r2, r2, #4 + ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ + add r0, r0, r9 /* r0 <- location to fix up in RAM */ + ldr r1, [r2, #4] + and r8, r1, #0xff + cmp r8, #23 /* relative fixup? */ + beq fixrel + cmp r8, #2 /* absolute fixup? */ + beq fixabs + /* ignore unknown type of fixup */ + b fixnext +fixabs: + /* absolute fix: set location to (offset) symbol value */ + mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ + add r1, r10, r1 /* r1 <- address of symbol in table */ + ldr r1, [r1, #4] /* r1 <- symbol value */ + add r1, r1, r9 /* r1 <- relocated sym addr */ + b fixnext +fixrel: + /* relative fix: increase location by offset */ + ldr r1, [r0] + add r1, r1, r9 +fixnext: + str r1, [r0] + add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ @@ -350,13 +377,11 @@ skip_hw_init: clear_bss: #ifndef CONFIG_PRELOADER - ldr r0, _bss_start - ldr r1, _bss_end + ldr r0, _bss_start_ofs + ldr r1, _bss_end_ofs ldr r3, _TEXT_BASE /* Text base */ mov r4, r7 /* reloc addr */ - sub r0, r0, r3 add r0, r0, r4 - sub r1, r1, r3 add r1, r1, r4 mov r2, #0x00000000 /* clear */ @@ -378,18 +403,20 @@ clbss_l:str r2, [r0] /* clear loop... */ _nand_boot: .word nand_boot #else - ldr r0, _TEXT_BASE - ldr r2, _board_init_r - sub r2, r2, r0 - add r2, r2, r7 /* position from board_init_r in RAM */ + ldr r0, _board_init_r_ofs + adr r1, _start + add lr, r0, r1 +#ifndef CONFIG_SKIP_RELOCATE_UBOOT + add lr, lr, r9 +#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ /* jump to it ... */ - mov lr, r2 mov pc, lr -_board_init_r: .word board_init_r +_board_init_r_ofs: + .word board_init_r - _start #endif #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ diff --git a/arch/arm/cpu/arm1176/u-boot.lds b/arch/arm/cpu/arm1176/u-boot.lds index fa640eec20..d9ed95405d 100644 --- a/arch/arm/cpu/arm1176/u-boot.lds +++ b/arch/arm/cpu/arm1176/u-boot.lds @@ -51,11 +51,14 @@ SECTIONS *(.data.rel.ro) } - __got_start = .; . = ALIGN(4); - .got : { *(.got) } + __rel_dyn_start = .; + .rel.dyn : { *(.rel.dyn) } + __rel_dyn_end = .; + + __dynsym_start = .; + .dynsym : { *(.dynsym) } - __got_end = .; . = .; __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } @@ -65,4 +68,10 @@ SECTIONS __bss_start = .; .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } _end = .; + + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } } -- cgit From 79e63139368eb7233b738d3d5a0df018a1287e3b Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 23 Oct 2010 23:22:38 +0200 Subject: ARM: use the same branch insn on all architectures For the "fixloop" implementation in start.S a number of different instructions was used. Unify code so all architectures use "blo" here because it is more robust in case of incorrect alignments. Signed-off-by: Wolfgang Denk Cc: Albert ARIBAUD Cc: Minkyu Kang Cc: Sandeep Paulraj Cc: Prafulla Wadaskar Cc: Stefano Babic Cc: Marek Vasut Acked-by: Heiko Schocher --- arch/arm/cpu/arm1136/start.S | 2 +- arch/arm/cpu/arm720t/start.S | 2 +- arch/arm/cpu/arm920t/start.S | 2 +- arch/arm/cpu/arm925t/start.S | 2 +- arch/arm/cpu/arm946es/start.S | 2 +- arch/arm/cpu/arm_intcm/start.S | 2 +- arch/arm/cpu/ixp/start.S | 2 +- arch/arm/cpu/lh7a40x/start.S | 2 +- arch/arm/cpu/s3c44b0/start.S | 2 +- arch/arm/cpu/sa1100/start.S | 2 +- 10 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index e3e646ca61..d70ca1d515 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -263,7 +263,7 @@ fixnext: str r1, [r0] add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 - ble fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 06aa3a25d4..41c1519efe 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -222,7 +222,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 84f754677f..f0274b1f82 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -268,7 +268,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index f45ad891bc..2ad2df847e 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -259,7 +259,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 25b573bcdf..22af2fae95 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -228,7 +228,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 3e9d5e8c93..a420f44ff5 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -226,7 +226,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 2931ccd616..a2560d4c2a 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -352,7 +352,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 703baf89a2..239ad47a4f 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -239,7 +239,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 77f3735e54..c58da98798 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -211,7 +211,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif /* now copy to sram the interrupt vector diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index 5635e0a30f..e6afe0f86f 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -215,7 +215,7 @@ fixloop: str r4, [r2] add r2, r2, #4 cmp r2, r3 - bne fixloop + blo fixloop #endif #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ -- cgit From 071bc923308832bbc541a887fece767d79a6dc7a Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 27 Oct 2010 22:48:30 +0200 Subject: Coding Style cleanup Signed-off-by: Wolfgang Denk --- arch/arm/cpu/arm926ejs/kirkwood/dram.c | 1 - arch/arm/cpu/pxa/cpu.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 7439c87f68..342afe9cd0 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c @@ -93,4 +93,3 @@ void dram_init_banksize(void) dram_init(); } #endif /* CONFIG_SYS_BOARD_DRAM_INIT */ - diff --git a/arch/arm/cpu/pxa/cpu.c b/arch/arm/cpu/pxa/cpu.c index 3ea34582e7..7d49cbb4fd 100644 --- a/arch/arm/cpu/pxa/cpu.c +++ b/arch/arm/cpu/pxa/cpu.c @@ -312,7 +312,7 @@ void pxa_wakeup(void) int arch_cpu_init(void) { pxa_gpio_setup(); -// pxa_wait_ticks(0x8000); +/* pxa_wait_ticks(0x8000); */ pxa_wakeup(); pxa_interrupt_setup(); pxa_clock_setup(); -- cgit From 9b8081a4525b3b2b655ba71fdeea1cb265d413e8 Mon Sep 17 00:00:00 2001 From: Mikhail Kshevetskiy Date: Thu, 28 Oct 2010 01:47:24 +0400 Subject: arm/pxa: remove unused arch-pxa/macro.h Signed-off-by: Mikhail Kshevetskiy --- arch/arm/cpu/pxa/start.S | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index bf8510eb76..f15a43ab9e 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -33,7 +33,6 @@ #include #include #include -#include /* takes care the CP15 update has taken place */ .macro CPWAIT reg -- cgit From 95707aaa9ef2dd84649c257cdcf563641322c4d3 Mon Sep 17 00:00:00 2001 From: Jason Liu Date: Thu, 21 Oct 2010 09:11:47 +0800 Subject: MX5:use common u-boot.lds of cpu layer Remove u-boot.lds from mx5 and use the common u-boot.lds of cpu layer. This patch also fix the building errors: arch/arm/cpu/armv7/start.o: In function `_rel_dyn_start_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_start' arch/arm/cpu/armv7/start.o: In function `_rel_dyn_end_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_end' arch/arm/cpu/armv7/start.o: In function `_dynsym_start_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__dynsym_start' Signed-off-by: Jason Liu --- arch/arm/cpu/armv7/mx5/u-boot.lds | 73 --------------------------------------- 1 file changed, 73 deletions(-) delete mode 100644 arch/arm/cpu/armv7/mx5/u-boot.lds (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/mx5/u-boot.lds b/arch/arm/cpu/armv7/mx5/u-boot.lds deleted file mode 100644 index 55d6599b41..0000000000 --- a/arch/arm/cpu/armv7/mx5/u-boot.lds +++ /dev/null @@ -1,73 +0,0 @@ -/* - * January 2004 - Changed to support H4 device - * Copyright (c) 2004 Texas Instruments - * - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * (C) Copyright 2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - arch/arm/cpu/armv7/start.o - *(.text) - } - - . = ALIGN(4); - .rodata : { *(.rodata) } - - . = ALIGN(4); - .data : { - *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) - } - - __got_start = .; - . = ALIGN(4); - .got : { *(.got) } - __got_end = .; - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - __bss_start = .; - .bss : { *(.bss) } - _end = .; -} -- cgit From 81129d07a0e9f6e28029170b082d6f8810f72712 Mon Sep 17 00:00:00 2001 From: Matthias Weisser Date: Wed, 27 Oct 2010 16:34:38 +0200 Subject: imx25: Fix reset This patch fixes the reset command on imx25. The watchdog registers are 16 bits in size and not 32. This patch also adds the service register codes as constants. Signed-off-by: Matthias Weisser --- arch/arm/cpu/arm926ejs/mx25/reset.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm926ejs/mx25/reset.c b/arch/arm/cpu/arm926ejs/mx25/reset.c index 1e33150eb9..1a43683081 100644 --- a/arch/arm/cpu/arm926ejs/mx25/reset.c +++ b/arch/arm/cpu/arm926ejs/mx25/reset.c @@ -43,14 +43,14 @@ void reset_cpu (ulong ignored) { struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE; /* Disable watchdog and set Time-Out field to 0 */ - writel (0x00000000, ®s->wcr); + writew(0, ®s->wcr); /* Write Service Sequence */ - writel (0x00005555, ®s->wsr); - writel (0x0000AAAA, ®s->wsr); + writew(WSR_UNLOCK1, ®s->wsr); + writew(WSR_UNLOCK2, ®s->wsr); /* Enable watchdog */ - writel (WCR_WDE, ®s->wcr); + writew(WCR_WDE, ®s->wcr); while (1) ; } -- cgit From 9a0044183a148ab553e296848cbfa4338fc83323 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Thu, 28 Oct 2010 11:08:52 +0200 Subject: MX51: remove warning in clock.c The patch removes the warning: clock.c:291: warning: initialization from incompatible pointer type after constification of args[] Signed-off-by: Stefano Babic --- arch/arm/cpu/armv7/mx5/clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index 00f649cf48..0b04a8819a 100644 --- a/arch/arm/cpu/armv7/mx5/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -269,7 +269,7 @@ u32 imx_get_fecclk(void) /* * Dump some core clockes. */ -int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { u32 freq; -- cgit From 28e57108a61bd0e554d9847170b8ad9dad093e07 Mon Sep 17 00:00:00 2001 From: Tanmay Upadhyay <[tanmay.upadhyay@einfochips.com]> Date: Thu, 28 Oct 2010 20:06:22 +0530 Subject: Kirkwood: bugfix: DRAM size initialization If start of any DRAM bank is greater than total DDR size, remaining DDR banks' start address & size were left un-initialized in dram_init function. This could break other functions who uses array 'gd->bd->bi_dram'. Kirkwood network driver is one example. This also stops Linux kernel from booting. v2 - Set start address also to 0. Without this Linux kernel couldn't boot up Signed-off-by: Tanmay Upadhyay --- arch/arm/cpu/arm926ejs/kirkwood/dram.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 7439c87f68..a4344b8296 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c @@ -81,6 +81,16 @@ int dram_init(void) gd->ram_size += gd->bd->bi_dram[i].size; } + + for (; i < CONFIG_NR_DRAM_BANKS; i++) { + /* If above loop terminated prematurely, we need to set + * remaining banks' start address & size as 0. Otherwise other + * u-boot functions and Linux kernel gets wrong values which + * could result in crash */ + gd->bd->bi_dram[i].start = 0; + gd->bd->bi_dram[i].size = 0; + } + return 0; } -- cgit From a9aa3926295df759306258e5e24cace414f53b67 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 28 Oct 2010 20:35:36 +0200 Subject: Drop support for CONFIG_SYS_ARM_WITHOUT_RELOC When this define was introduced, the idea was to provide a soft migration path for ARM boards to get adapted to the new relocation support. However, other recent changes led to a different implementation (ELF relocation), where this no longer works. By now CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it actually hurts because it obfuscates the actual code by sprinkling it with lots of dead and non-working debris. So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC. Signed-off-by: Wolfgang Denk Tested-by: Heiko Schocher Tested-by: Reinhard Meyer --- arch/arm/cpu/arm1136/start.S | 127 -------------------- arch/arm/cpu/arm1176/start.S | 214 ---------------------------------- arch/arm/cpu/arm720t/start.S | 105 ----------------- arch/arm/cpu/arm920t/start.S | 144 ----------------------- arch/arm/cpu/arm925t/start.S | 121 ------------------- arch/arm/cpu/arm926ejs/orion5x/dram.c | 15 --- arch/arm/cpu/arm926ejs/start.S | 96 --------------- arch/arm/cpu/arm946es/start.S | 85 -------------- arch/arm/cpu/arm_intcm/start.S | 87 -------------- arch/arm/cpu/armv7/omap3/emif4.c | 24 ---- arch/arm/cpu/armv7/omap3/sdrc.c | 28 ----- arch/arm/cpu/armv7/omap4/board.c | 5 - arch/arm/cpu/armv7/start.S | 113 ------------------ arch/arm/cpu/ixp/start.S | 203 -------------------------------- arch/arm/cpu/lh7a40x/start.S | 113 ------------------ arch/arm/cpu/pxa/start.S | 28 ++--- arch/arm/cpu/s3c44b0/start.S | 85 -------------- arch/arm/cpu/sa1100/start.S | 88 -------------- 18 files changed, 8 insertions(+), 1673 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index d70ca1d515..9f172b625d 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -132,14 +132,11 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: .word 0x0badc0de -#endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* * the actual reset code */ @@ -318,112 +315,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - -#ifdef CONFIG_OMAP2420H4 - /* Copy vectors to mask ROM indirect addr */ - adr r0, _start /* r0 <- current position of code */ - add r0, r0, #4 /* skip reset vector */ - mov r2, #64 /* r2 <- size to copy */ - add r2, r0, r2 /* r2 <- source end address */ - mov r1, #SRAM_OFFSET0 /* build vect addr */ - mov r3, #SRAM_OFFSET1 - add r1, r1, r3 - mov r3, #SRAM_OFFSET2 - add r1, r1, r3 -next: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - bne next /* loop until equal */ - bl cpy_clk_code /* put dpll adjust code behind vectors */ -#endif - /* the mask ROM code should have PLL and others stable */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ -#ifndef CONFIG_PRELOADER - beq stack_setup -#endif /* CONFIG_PRELOADER */ - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ -#ifdef CONFIG_PRELOADER - sub sp, r0, #128 /* leave 32 words for abort-stack */ -#else - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ -#endif /* CONFIG_PRELOADER */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - adr r2, _start - ldr r0, _bss_start_ofs /* find start of bss segment */ - add r0, r0, r2 - ldr r1, _bss_end_ofs /* stop here */ - add r1, r1, r2 - mov r2, #0x00000000 /* clear */ - -#ifndef CONFIG_PRELOADER -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - bne clbss_l -#endif - - ldr r0, _start_armboot_ofs - adr r1, _start - add r0, r0, r1 - ldr pc, r0 - -_start_armboot_ofs: -#ifdef CONFIG_NAND_SPL - .word nand_boot - _start -#else -#ifdef CONFIG_ONENAND_IPL - .word start_oneboot - _start -#else - .word start_armboot - _start -#endif /* CONFIG_ONENAND_IPL */ -#endif /* CONFIG_NAND_SPL */ - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -508,13 +399,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack -#else - adr r2, _start - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#endif ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -545,13 +430,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode) -#else - adr r13, _start @ setup our mode stack (enter in banked mode) - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr @@ -567,13 +446,7 @@ cpu_init_crit: .macro get_bad_stack_swi sub r13, r13, #4 @ space on current stack for scratch reg. str r0, [r13] @ save R0's value. -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r0, IRQ_STACK_START_IN @ get data regions start -#else - ldr r0, _armboot_start @ get data regions start - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack -#endif str lr, [r0] @ save caller lr in position 0 of saved stack mrs r0, spsr @ get the spsr str lr, [r0, #4] @ save spsr in position 1 of saved stack diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 7f32db7874..1a2e5aa37e 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -108,12 +108,6 @@ _TEXT_BASE: _TEXT_PHY_BASE: .word CONFIG_SYS_PHY_UBOOT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. * Subtracting _start from them lets the linker put their @@ -157,7 +151,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -419,188 +412,6 @@ _board_init_r_ofs: .word board_init_r - _start #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x3f - orr r0, r0, #0xd3 - msr cpsr, r0 - -/* - ************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - ************************************************************************* - */ - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -cpu_init_crit: - /* - * When booting from NAND - it has definitely been a reset, so, no need - * to flush caches and disable the MMU - */ -#ifndef CONFIG_NAND_SPL - /* - * flush v4 I/D caches - */ - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - - /* - * disable MMU stuff and caches - */ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) - bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) - orr r0, r0, #0x00000002 @ set bit 2 (A) Align - orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache - - /* Prepare to disable the MMU */ - adr r2, mmu_disable_phys - sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE) - b mmu_disable - - .align 5 - /* Run in a single cache-line */ -mmu_disable: - mcr p15, 0, r0, c1, c0, 0 - nop - nop - mov pc, r2 -mmu_disable_phys: - -#ifdef CONFIG_DISABLE_TCM - /* - * Disable the TCMs - */ - mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */ - cmp r0, #0 - beq skip_tcmdisable - mov r1, #0 - mov r2, #1 - tst r0, r2 - mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/ - tst r0, r2, LSL #16 - mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/ -skip_tcmdisable: -#endif -#endif - -#ifdef CONFIG_PERIPORT_REMAP - /* Peri port setup */ - ldr r0, =CONFIG_PERIPORT_BASE - orr r0, r0, #CONFIG_PERIPORT_SIZE - mcr p15,0,r0,c15,c2,4 -#endif - - /* - * Go setup Memory and board specific bits prior to relocation. - */ - bl lowlevel_init /* go setup pll,mux,memory */ - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - -#ifdef CONFIG_ENABLE_MMU -enable_mmu: - /* enable domain access */ - ldr r5, =0x0000ffff - mcr p15, 0, r5, c3, c0, 0 /* load domain access register */ - - /* Set the TTB register */ - ldr r0, _mmu_table_base - ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE - ldr r2, =0xfff00000 - bic r0, r0, r2 - orr r1, r0, r1 - mcr p15, 0, r1, c2, c0, 0 - - /* Enable the MMU */ - mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #1 /* Set CR_M to enable MMU */ - - /* Prepare to enable the MMU */ - adr r1, skip_hw_init - and r1, r1, #0x3fc - ldr r2, _TEXT_BASE - ldr r3, =0xfff00000 - and r2, r2, r3 - orr r2, r2, r1 - b mmu_enable - - .align 5 - /* Run in a single cache-line */ -mmu_enable: - - mcr p15, 0, r0, c1, c0, 0 - nop - nop - mov pc, r2 -skip_hw_init: -#endif - - /* Set up the stack */ -stack_setup: - ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0 /* clear */ - -clbss_l: - str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - -#ifndef CONFIG_NAND_SPL - ldr pc, _start_armboot - -_start_armboot: - .word start_armboot -#else - b nand_boot -/* .word nand_boot*/ -#endif - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - #ifdef CONFIG_ENABLE_MMU _mmu_table_base: .word mmu_table @@ -687,14 +498,7 @@ phy_last_jump: /* Save user registers (now in svc mode) r0-r12 */ stmia sp, {r0 - r12} -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - /* set base 2 words into abort stack */ - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) -#else ldr r2, IRQ_STACK_START_IN -#endif /* get values for "aborted" pc and cpsr (into parm regs) */ ldmia r2, {r2 - r3} /* grab pointer to old stack */ @@ -709,16 +513,7 @@ phy_last_jump: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - /* setup our mode stack (enter in banked mode) */ - ldr r13, _armboot_start - /* move past malloc pool */ - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) - /* move to reserved a couple spots for abort stack */ - sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif /* save caller lr in position 0 of saved stack */ str lr, [r13] @@ -743,16 +538,7 @@ phy_last_jump: sub r13, r13, #4 /* save R0's value. */ str r0, [r13] -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - /* get data regions start */ - ldr r0, _armboot_start - /* move past malloc pool */ - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) - /* move past gbl and a couple spots for abort stack */ - sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif /* save caller lr in position 0 of saved stack */ str lr, [r0] /* get the spsr */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 41c1519efe..b94ecb4353 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -79,12 +79,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -108,7 +102,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -264,92 +257,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0x13 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifdef CONFIG_LPC2292 - bl lowlevel_init -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - -#if CONFIG_SYS_TEXT_BASE -#ifndef CONFIG_LPC2292 /* already done in lowlevel_init */ - ldr r2, =0x0 /* Relocate the exception vectors */ - cmp r1, r2 /* and associated data to address */ - ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */ - stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */ - ldmneia r0, {r3-r9} - stmneia r2, {r3-r9} - adrne r0, _start /* restore r0 */ -#endif /* !CONFIG_LPC2292 */ -#endif - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -606,13 +513,7 @@ lock_loop: stmia sp, {r0 - r12} @ Calling r0-r12 add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -643,13 +544,7 @@ lock_loop: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index f0274b1f82..08d4e7bc3d 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -75,12 +75,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -104,7 +98,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -316,127 +309,6 @@ _nand_boot: .word nand_boot _board_init_r: .word board_init_r #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual start code - */ - -start_code: - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x1f - orr r0, r0, #0xd3 - msr cpsr, r0 - - bl coloured_LED_init - bl red_LED_on - -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) - /* - * relocate exception table - */ - ldr r0, =_start - ldr r1, =0x0 - mov r2, #16 -copyex: - subs r2, r2, #1 - ldr r3, [r0], #4 - str r3, [r1], #4 - bne copyex -#endif - -#ifdef CONFIG_S3C24X0 - /* turn off the watchdog */ - -# if defined(CONFIG_S3C2400) -# define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ -# define CLKDIVN 0x14800014 /* clock divisor register */ -#else -# define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ -# define INTSUBMSK 0x4A00001C -# define CLKDIVN 0x4C000014 /* clock divisor register */ -# endif - - ldr r0, =pWTCON - mov r1, #0x0 - str r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTMR - default - */ - mov r1, #0xffffffff - ldr r0, =INTMSK - str r1, [r0] -# if defined(CONFIG_S3C2410) - ldr r1, =0x3ff - ldr r0, =INTSUBMSK - str r1, [r0] -# endif - - /* FCLK:HCLK:PCLK = 1:2:4 */ - /* default FCLK is 120 MHz ! */ - ldr r0, =CLKDIVN - mov r1, #3 - str r1, [r0] -#endif /* CONFIG_S3C24X0 */ - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -525,15 +397,7 @@ cpu_init_crit: .macro bad_save_user_regs sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Calling r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE) - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - /* set base 2 words into abort stack */ - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r3} @ get pc, cpsr add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -565,15 +429,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE) - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) - /* reserve a couple spots in abort stack */ - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 2ad2df847e..6792a22aff 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -85,12 +85,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -114,7 +108,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -305,108 +298,6 @@ _nand_boot: .word nand_boot _board_init_r: .word board_init_r #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * Set up 925T mode - */ - mov r1, #0x81 /* Set ARM925T configuration. */ - mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */ - - /* - * turn off the watchdog, unlock/diable sequence - */ - mov r1, #0xF5 - ldr r0, =WDTIM_MODE - strh r1, [r0] - mov r1, #0xA0 - strh r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTMR - default - */ - mov r1, #0xffffffff - ldr r0, =REG_IHL1_MIR - str r1, [r0] - ldr r0, =REG_IHL2_MIR - str r1, [r0] - - /* - * wait for dpll to lock - */ - ldr r0, =CK_DPLL1 - mov r1, #0x10 - strh r1, [r0] -poll1: - ldrh r1, [r0] - ands r1, r1, #0x01 - beq poll1 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -489,13 +380,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -526,13 +411,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index c5c8ab7e4d..b749282099 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -49,20 +49,6 @@ u32 orion5x_sdram_bar(enum memory_bank bank) result = winregs[bank].base; return result; } -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); - gd->bd->bi_dram[i].size = get_ram_size( - (volatile long *) (gd->bd->bi_dram[i].start), - CONFIG_MAX_RAM_BANK_SIZE); - } - return 0; -} -#else int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -83,4 +69,3 @@ void dram_init_banksize (void) CONFIG_MAX_RAM_BANK_SIZE); } } -#endif diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 7397882b59..4f689c1ef5 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -145,7 +145,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -307,89 +306,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */ - add r2, r0, r3 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub sp, r0, #128 /* leave 32 words for abort-stack */ -#ifndef CONFIG_PRELOADER - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif -#endif /* CONFIG_PRELOADER */ - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - adr r2, _start - ldr r0, _bss_start_ofs /* find start of bss segment */ - add r0, r0, r2 - ldr r1, _bss_end_ofs /* stop here */ - add r1, r1, r2 - mov r2, #0x00000000 /* clear */ - -#ifndef CONFIG_PRELOADER -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - bl coloured_LED_init - bl red_LED_on -#endif /* CONFIG_PRELOADER */ - - ldr r0, _start_armboot_ofs - adr r1, _start - add r0, r0, r1 - ldr pc, r0 - -_start_armboot_ofs: -#ifdef CONFIG_NAND_SPL - .word nand_boot - _start -#else - .word start_armboot - _start -#endif /* CONFIG_NAND_SPL */ -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -474,13 +390,7 @@ cpu_init_crit: @ carve out a frame on current user stack sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - adr r2, _start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif @ get values for "aborted" pc and cpsr (into parm regs) ldmia r2, {r2 - r3} add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -512,13 +422,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - adr r13, _start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 22af2fae95..7378edc41c 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -89,12 +89,6 @@ _fiq: _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -118,7 +112,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -273,72 +266,6 @@ _nand_boot: .word nand_boot _board_init_r: .word board_init_r #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - bne clbss_l - - ldr pc, _start_armboot - -_start_armboot: - .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -424,13 +351,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif @ get values for "aborted" pc and cpsr (into parm regs) ldmia r2, {r2 - r3} add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -462,13 +383,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index a420f44ff5..2240f3a524 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -87,12 +87,6 @@ _fiq: _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */ -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -116,7 +110,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -268,74 +261,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ -.globl reset -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* pc relative address of label */ - ldr r1, _TEXT_BASE /* linked image address of label */ - cmp r0, r1 /* test if we run from flash or RAM */ - beq stack_setup /* ifeq we are in the RAM copy */ - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: - .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -400,13 +325,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif @ get values for "aborted" pc and cpsr (into parm regs) ldmia r2, {r2 - r3} add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -438,13 +357,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/armv7/omap3/emif4.c b/arch/arm/cpu/armv7/omap3/emif4.c index da2cd90013..0870857ede 100644 --- a/arch/arm/cpu/armv7/omap3/emif4.c +++ b/arch/arm/cpu/armv7/omap3/emif4.c @@ -136,29 +136,6 @@ void do_emif4_init(void) * dram_init - * - Sets uboots idea of sdram size */ -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - DECLARE_GLOBAL_DATA_PTR; - unsigned int size0 = 0, size1 = 0; - - size0 = get_sdr_cs_size(CS0); - /* - * If a second bank of DDR is attached to CS1 this is - * where it can be started. Early init code will init - * memory on CS0. - */ - if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) - size1 = get_sdr_cs_size(CS1); - - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = size0; - gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); - gd->bd->bi_dram[1].size = size1; - - return 0; -} -#else int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; @@ -190,7 +167,6 @@ void dram_init_banksize (void) gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); gd->bd->bi_dram[1].size = size1; } -#endif /* * mem_init() - diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 6c419f5b93..c75aa1d11c 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -163,33 +163,6 @@ void do_sdrc_init(u32 cs, u32 early) * dram_init - * - Sets uboots idea of sdram size */ -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - DECLARE_GLOBAL_DATA_PTR; - unsigned int size0 = 0, size1 = 0; - - size0 = get_sdr_cs_size(CS0); - /* - * If a second bank of DDR is attached to CS1 this is - * where it can be started. Early init code will init - * memory on CS0. - */ - if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) { - do_sdrc_init(CS1, NOT_EARLY); - make_cs1_contiguous(); - - size1 = get_sdr_cs_size(CS1); - } - - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = size0; - gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); - gd->bd->bi_dram[1].size = size1; - - return 0; -} -#else int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; @@ -225,7 +198,6 @@ void dram_init_banksize (void) gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); gd->bd->bi_dram[1].size = size1; } -#endif /* * mem_init - diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index 24a66f5b94..e7651d2dd5 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -102,12 +102,7 @@ int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - gd->bd->bi_dram[0].start = 0x80000000; - gd->bd->bi_dram[0].size = sdram_size(); -#else gd->ram_size = sdram_size(); -#endif return 0; } diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index bdf2fad380..4a0710c96d 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -70,12 +70,6 @@ _end_vect: _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -99,7 +93,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -295,94 +288,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x1f - orr r0, r0, #0xd3 - msr cpsr,r0 - -#if (CONFIG_OMAP34XX) - /* Copy vectors to mask ROM indirect addr */ - adr r0, _start @ r0 <- current position of code - add r0, r0, #4 @ skip reset vector - mov r2, #64 @ r2 <- size to copy - add r2, r0, r2 @ r2 <- source end address - mov r1, #SRAM_OFFSET0 @ build vect addr - mov r3, #SRAM_OFFSET1 - add r1, r1, r3 - mov r3, #SRAM_OFFSET2 - add r1, r1, r3 -next: - ldmia r0!, {r3 - r10} @ copy from source address [r0] - stmia r1!, {r3 - r10} @ copy to target address [r1] - cmp r0, r2 @ until source end address [r2] - bne next @ loop until equal */ -#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT) - /* No need to copy/exec the clock code - DPLL adjust already done - * in NAND/oneNAND Boot. - */ - bl cpy_clk_code @ put dpll adjust code behind vectors -#endif /* NAND Boot */ -#endif - /* the mask ROM code should have PLL and others stable */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: @ relocate U-Boot to RAM - adr r0, _start @ r0 <- current position of code - ldr r1, _TEXT_BASE @ test if we run from flash or RAM - cmp r0, r1 @ don't reloc during debug - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 @ r2 <- size of armboot - add r2, r0, r2 @ r2 <- source end address - -copy_loop: @ copy 32 bytes at a time - ldmia r0!, {r3 - r10} @ copy from source address [r0] - stmia r1!, {r3 - r10} @ copy to target address [r1] - cmp r0, r2 @ until source end address [r2] - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE @ upper 128 KiB: relocated uboot - sub r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area - sub r0, r0, #GENERATED_GBL_DATA_SIZE @ bdinfo -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 @ leave 3 words for abort-stack - bic sp, sp, #7 @ 8-byte alignment for ABI compliance - - /* Clear BSS (if any). Is below tx (watch load addr - need space) */ -clear_bss: - ldr r0, _bss_start @ find start of bss segment - ldr r1, _bss_end @ stop here - mov r2, #0x00000000 @ clear value -clbss_l: - str r2, [r0] @ clear BSS location - cmp r0, r1 @ are we at the end yet - add r0, r0, #4 @ increment clear index pointer - bne clbss_l @ keep clearing till at end - - ldr pc, _start_armboot @ jump to C code - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /************************************************************************* * * CPU_init_critical registers @@ -464,14 +369,8 @@ cpu_init_crit: @ user stack stmia sp, {r0 - r12} @ Save user registers (now in @ svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE + 8) @ set base 2 words into abort -#else ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort @ stack -#endif ldmia r2, {r2 - r3} @ get values for "aborted" pc @ and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -507,14 +406,8 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack (enter - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) @ move to reserved a couple -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter @ in banked mode) -#endif str lr, [r13] @ save caller lr in position 0 @ of saved stack @@ -535,14 +428,8 @@ cpu_init_crit: sub r13, r13, #4 @ space on current stack for @ scratch reg. str r0, [r13] @ save R0's value. -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r0, _armboot_start @ get data regions start - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) @ move past gbl and a couple -#else ldr r0, IRQ_STACK_START_IN @ get data regions start @ spots for abort stack -#endif str lr, [r0] @ save caller lr in position 0 @ of saved stack mrs r0, spsr @ get the spsr diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index a2560d4c2a..0269207bb2 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -98,12 +98,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -127,7 +121,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -394,190 +387,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/****************************************************************************/ -/* */ -/* the actual reset code */ -/* */ -/****************************************************************************/ - -reset: - /* disable mmu, set big-endian */ - mov r0, #0xf8 - mcr p15, 0, r0, c1, c0, 0 - CPWAIT r0 - - /* invalidate I & D caches & BTB */ - mcr p15, 0, r0, c7, c7, 0 - CPWAIT r0 - - /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 - CPWAIT r0 - - /* drain write and fill buffers */ - mcr p15, 0, r0, c7, c10, 4 - CPWAIT r0 - - /* disable write buffer coalescing */ - mrc p15, 0, r0, c1, c0, 1 - orr r0, r0, #1 - mcr p15, 0, r0, c1, c0, 1 - CPWAIT r0 - - /* set EXP CS0 to the optimum timing */ - ldr r1, =CONFIG_SYS_EXP_CS0 - ldr r2, =IXP425_EXP_CS0 - str r1, [r2] - - /* make sure flash is visible at 0 */ -#if 0 - ldr r2, =IXP425_EXP_CFG0 - ldr r1, [r2] - orr r1, r1, #0x80000000 - str r1, [r2] -#endif - mov r1, #CONFIG_SYS_SDR_CONFIG - ldr r2, =IXP425_SDR_CONFIG - str r1, [r2] - - /* disable refresh cycles */ - mov r1, #0 - ldr r3, =IXP425_SDR_REFRESH - str r1, [r3] - - /* send nop command */ - mov r1, #3 - ldr r4, =IXP425_SDR_IR - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* set SDRAM internal refresh val */ - ldr r1, =CONFIG_SYS_SDRAM_REFRESH_CNT - str r1, [r3] - DELAY_FOR 0x4000, r0 - - /* send precharge-all command to close all open banks */ - mov r1, #2 - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* provide 8 auto-refresh cycles */ - mov r1, #4 - mov r5, #8 -111: str r1, [r4] - DELAY_FOR 0x100, r0 - subs r5, r5, #1 - bne 111b - - /* set mode register in sdram */ - mov r1, #CONFIG_SYS_SDR_MODE_CONFIG - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* send normal operation command */ - mov r1, #6 - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* copy */ - mov r0, #0 - mov r4, r0 - add r2, r0, #CONFIG_SYS_MONITOR_LEN - mov r1, #0x10000000 - mov r5, r1 - - 30: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r0, r2 - bne 30b - - /* invalidate I & D caches & BTB */ - mcr p15, 0, r0, c7, c7, 0 - CPWAIT r0 - - /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 - CPWAIT r0 - - /* drain write and fill buffers */ - mcr p15, 0, r0, c7, c10, 4 - CPWAIT r0 - - /* move flash to 0x50000000 */ - ldr r2, =IXP425_EXP_CFG0 - ldr r1, [r2] - bic r1, r1, #0x80000000 - str r1, [r2] - - nop - nop - nop - nop - nop - nop - - /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 - CPWAIT r0 - - /* enable I cache */ - mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #MMU_Control_I - mcr p15, 0, r0, c1, c0, 0 - CPWAIT r0 - - mrs r0,cpsr /* set the cpu to SVC32 mode */ - bic r0,r0,#0x1f /* (superviser mode, M=10011) */ - orr r0,r0,#0x13 - msr cpsr,r0 - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /****************************************************************************/ /* */ @@ -618,13 +427,7 @@ _start_armboot: .word start_armboot stmia sp, {r0 - r12} /* Calling r0-r12 */ add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */ add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */ @@ -659,13 +462,7 @@ _start_armboot: .word start_armboot .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 239ad47a4f..080d29d20b 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -75,12 +75,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -104,7 +98,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -278,100 +271,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - -#define pWDTCTL 0x80001400 /* Watchdog Timer control register */ -#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */ -#define pCLKSET 0x80000420 /* clock divisor register */ - - /* disable watchdog, set watchdog control register to - * all zeros (default reset) - */ - ldr r0, =pWDTCTL - mov r1, #0x0 - str r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTENC register (default) - */ - mov r1, #0xffffffff - ldr r0, =pINTENC - str r1, [r0] - - /* FCLK:HCLK:PCLK = 1:2:2 */ - /* default FCLK is 200 MHz, using 14.7456 MHz fin */ - ldr r0, =pCLKSET - ldr r1, =0x0004ee39 -@ ldr r1, =0x0005ee39 @ 1: 2: 4 - str r1, [r0] - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - @add r0, r0, #4 /* start at first byte of bss */ - /* why inc. 4 bytes past then? */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -460,13 +359,7 @@ cpu_init_crit: .macro bad_save_user_regs sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Calling r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r3} @ get pc, cpsr add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -497,13 +390,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index bf8510eb76..03cf4dec36 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -299,7 +299,7 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop -#endif +#endif /* #ifndef CONFIG_PRELOADER */ #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: @@ -316,7 +316,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif +#endif /* #ifndef CONFIG_PRELOADER */ /* * We are done. Do not return, instead branch to second part of board @@ -343,7 +343,7 @@ _start_oneboot_ofs _board_init_r_ofs: .word board_init_r - _start -#endif +#endif /* CONFIG_ONENAND_IPL */ _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -352,7 +352,7 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ +#else /* CONFIG_PRELOADER */ /****************************************************************************/ /* */ @@ -377,7 +377,7 @@ reset: /* Start OneNAND IPL */ ldr pc, =start_oneboot -#endif /* #if !defined(CONFIG_ONENAND_IPL) */ +#endif /* CONFIG_PRELOADER */ #ifndef CONFIG_PRELOADER /****************************************************************************/ @@ -419,13 +419,7 @@ reset: stmia sp, {r0 - r12} /* Calling r0-r12 */ add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */ add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */ @@ -460,13 +454,7 @@ reset: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr @@ -485,7 +473,7 @@ reset: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_PRELOADER /****************************************************************************/ @@ -499,7 +487,7 @@ reset: do_hang: ldr sp, _TEXT_BASE /* use 32 words abort stack */ bl hang /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else .align 5 undefined_instruction: get_bad_stack @@ -618,4 +606,4 @@ mmu_table: .word (__base << 20) | 0xc12 .set __base, __base + 1 .endr -#endif +#endif /* CONFIG_PRELOADER */ diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index c58da98798..ca95dea552 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -66,12 +66,6 @@ _start: b reset _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -95,7 +89,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -265,84 +258,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0x13 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit - /* - * before relocating, we have to setup RAM timing - * because memory timing is board-dependend, you will - * find a lowlevel_init.S in your board directory. - */ - bl lowlevel_init -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - -/* - now copy to sram the interrupt vector -*/ - adr r0, real_vectors - add r2, r0, #1024 - ldr r1, =0x0c000000 - add r1, r1, #0x08 -vector_copy_loop: - ldmia r0!, {r3-r10} - stmia r1!, {r3-r10} - cmp r0, r2 - blo vector_copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index e6afe0f86f..ab6e2f2194 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -76,12 +76,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -105,7 +99,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -254,75 +247,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0x13 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -441,13 +365,7 @@ cpu_init_crit: stmia sp, {r0 - r12} @ Calling r0-r12 add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -478,13 +396,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr -- cgit From e03f31697478e9edd523f34b1ed54b6ff2cb7242 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 28 Oct 2010 20:52:49 +0200 Subject: Drop support for CONFIG_SKIP_RELOCATE_UBOOT For ARM systems, before ELF relocation was introduced, CONFIG_SKIP_RELOCATE_UBOOT coul be used to prevent *COPYING* the U-Boot image from whereever it was loaded to it's link address (CONFIG_SYS_TEXT_BASE). The name was badly chosen, as no relocation was performed at all, it was just a memcpy(). With ELF relocation, this does not work like that any more, and related boards need to be fixed anyway. So don't keep this relict any longer. Signed-off-by: Wolfgang Denk Tested-by: Heiko Schocher Tested-by: Reinhard Meyer --- arch/arm/cpu/arm1136/start.S | 4 ---- arch/arm/cpu/arm1176/start.S | 4 ---- arch/arm/cpu/arm720t/start.S | 2 -- arch/arm/cpu/arm920t/start.S | 2 -- arch/arm/cpu/arm925t/start.S | 2 -- arch/arm/cpu/arm926ejs/start.S | 4 ---- arch/arm/cpu/arm946es/start.S | 2 -- arch/arm/cpu/arm_intcm/start.S | 2 -- arch/arm/cpu/armv7/start.S | 4 ---- arch/arm/cpu/ixp/start.S | 2 -- arch/arm/cpu/lh7a40x/start.S | 2 -- arch/arm/cpu/pxa/start.S | 4 ---- arch/arm/cpu/s3c44b0/start.S | 2 -- arch/arm/cpu/sa1100/start.S | 2 -- 14 files changed, 38 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 9f172b625d..aecc943c8e 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -215,7 +215,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -262,7 +261,6 @@ fixnext: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER @@ -295,9 +293,7 @@ jump_2_ram: ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 -#ifndef CONFIG_SKIP_RELOCATE_UBOOT add lr, lr, r9 -#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 1a2e5aa37e..f04d268881 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -281,7 +281,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -328,7 +327,6 @@ fixnext: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ #ifdef CONFIG_ENABLE_MMU enable_mmu: @@ -399,9 +397,7 @@ _nand_boot: .word nand_boot ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 -#ifndef CONFIG_SKIP_RELOCATE_UBOOT add lr, lr, r9 -#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index b94ecb4353..8cd267b352 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -190,7 +190,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -217,7 +216,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 08d4e7bc3d..d4edde797b 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -236,7 +236,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -263,7 +262,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 6792a22aff..51229c6154 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -227,7 +227,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -254,7 +253,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 4f689c1ef5..6dcc9b4d67 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -204,7 +204,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -251,7 +250,6 @@ fixnext: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER @@ -286,9 +284,7 @@ _nand_boot_ofs: ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 -#ifndef CONFIG_SKIP_RELOCATE_UBOOT add lr, lr, r9 -#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 7378edc41c..cad43ba048 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -196,7 +196,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -223,7 +222,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index 2240f3a524..957ca34766 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -194,7 +194,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -221,7 +220,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 4a0710c96d..bb3948d401 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -189,7 +189,6 @@ relocate_code: stack_setup: mov sp, r4 -#ifndef CONFIG_SKIP_RELOCATE_UBOOT adr r0, _start ldr r2, _TEXT_BASE ldr r3, _bss_start_ofs @@ -259,7 +258,6 @@ clbss_l:str r2, [r0] /* clear loop... */ cmp r0, r1 bne clbss_l #endif /* #ifndef CONFIG_PRELOADER */ -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ /* * We are done. Do not return, instead branch to second part of board @@ -269,9 +267,7 @@ jump_2_ram: ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 -#ifndef CONFIG_SKIP_RELOCATE_UBOOT add lr, lr, r9 -#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 0269207bb2..8d1aebc719 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -320,7 +320,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -347,7 +346,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 080d29d20b..fd8a40b8aa 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -207,7 +207,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -234,7 +233,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 03cf4dec36..a136ed83fd 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -251,7 +251,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT stmfd sp!, {r0-r12} copy_loop: ldmia r0!, {r3-r5, r7-r11} /* copy from source address [r0] */ @@ -300,7 +299,6 @@ fixnext: cmp r2, r3 blo fixloop #endif /* #ifndef CONFIG_PRELOADER */ -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER @@ -332,9 +330,7 @@ _start_oneboot_ofs ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 -#ifndef CONFIG_SKIP_RELOCATE_UBOOT add lr, lr, r9 -#endif /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r7 /* dest_addr */ diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index ca95dea552..67b2c6a695 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -179,7 +179,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -218,7 +217,6 @@ vector_copy_loop: stmia r1!, {r3-r10} cmp r0, r2 blo vector_copy_loop -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index ab6e2f2194..ace0c074df 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -183,7 +183,6 @@ stack_setup: cmp r0, r6 beq clear_bss -#ifndef CONFIG_SKIP_RELOCATE_UBOOT copy_loop: ldmia r0!, {r9-r10} /* copy from source address [r0] */ stmia r6!, {r9-r10} /* copy to target address [r1] */ @@ -210,7 +209,6 @@ fixloop: cmp r2, r3 blo fixloop #endif -#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: #ifndef CONFIG_PRELOADER -- cgit From 0fc43a417c4ba5ab63dad6736a18f3bf7008f35f Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Thu, 4 Nov 2010 16:05:25 -0400 Subject: armv7, beagle: Second SDRAM bank don;t work since commit 3667cbeed5e3c4067e624e52a916b1ebb02c8f05 on beagle board the second sdram bank didn;t longer work. Since this patch sdram settings just get copied from bank a, but CMD_NOP, CMD_PRECHARGE, CMD_AUTOREFRESH are not executed and after that mr register is also not updated. This patch adds this for the bank b. Signed-off-by: Heiko Schocher cc: Steve Sakoman cc: Sandeep Paulraj cc: Wolfgang Denk Signed-off-by: Sandeep Paulraj --- arch/arm/cpu/armv7/omap3/sdrc.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index c75aa1d11c..a4979ce61d 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -149,6 +149,13 @@ void do_sdrc_init(u32 cs, u32 early) &sdrc_actim_base1->ctrla); writel(readl(&sdrc_actim_base0->ctrlb), &sdrc_actim_base1->ctrlb); + + writel(CMD_NOP, &sdrc_base->cs[cs].manual); + writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual); + writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual); + writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual); + writel(readl(&sdrc_base->cs[CS0].mr), + &sdrc_base->cs[CS1].mr); } /* -- cgit