From d735a99d3b15daa8edfc10e52fa8860c06fe803c Mon Sep 17 00:00:00 2001 From: Christian Riesch Date: Thu, 2 Feb 2012 00:44:40 +0000 Subject: arm, arm926ejs: Enable icache only if CONFIG_SYS_ICACHE_OFF is not defined Signed-off-by: Christian Riesch Cc: Albert Aribaud Cc: Tom Rini Acked-by: Heiko Schocher Tested-by: Heiko Schocher --- arch/arm/cpu/arm926ejs/start.S | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 525c1122c9..6f05f1ac49 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -369,7 +369,8 @@ flush_dcache: mcr p15, 0, r0, c7, c5, 0 /* invalidate I Cache */ /* - * disable MMU and D cache, and enable I cache + * disable MMU and D cache + * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined */ mrc p15, 0, r0, c1, c0, 0 bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */ @@ -380,7 +381,9 @@ flush_dcache: bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */ #endif orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ +#ifndef CONFIG_SYS_ICACHE_OFF orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ +#endif mcr p15, 0, r0, c1, c0, 0 /* -- cgit