From 193e7e5a8e93fa3076a80fa6c7b687401f08108b Mon Sep 17 00:00:00 2001 From: Haikun Wang Date: Fri, 26 Jun 2015 19:48:58 +0800 Subject: arm/dts/ls2085a: Add dts files for LS2085AQDS and LS2085ARDB Add dts source files for LS2085AQDS and LS2085ARDB boards. Signed-off-by: Haikun Wang Reviewed-by: York Sun --- arch/arm/dts/fsl-ls2085a-qds.dts | 53 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm/dts/fsl-ls2085a-qds.dts (limited to 'arch/arm/dts/fsl-ls2085a-qds.dts') diff --git a/arch/arm/dts/fsl-ls2085a-qds.dts b/arch/arm/dts/fsl-ls2085a-qds.dts new file mode 100644 index 0000000000..4477e54154 --- /dev/null +++ b/arch/arm/dts/fsl-ls2085a-qds.dts @@ -0,0 +1,53 @@ +/* + * Freescale ls2085a QDS board device tree source + * + * Copyright 2013-2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "fsl-ls2085a.dtsi" + +/ { + model = "Freescale Layerscape 2085a QDS Board"; + compatible = "fsl,ls2085a-qds", "fsl,ls2085a"; + + aliases { + spi1 = &dspi; + }; +}; + +&dspi { + bus-num = <0>; + status = "okay"; + + dflash0: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; + dflash1: sst25wf040b { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <1>; + }; + dflash2: en25s64 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <3000000>; + spi-cpol; + spi-cpha; + reg = <2>; + }; +}; -- cgit