From b414ab70cde2ae9467bd2120171dbdfa72df5231 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 4 Mar 2019 12:28:31 +0100 Subject: ARM: dts: rmobile: Import R8A77965 M3NULCB DTs Import R8A77965 M3N ULCB device trees from Linux 5.0 , commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 . Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/r8a77965-m3nulcb-u-boot.dts | 43 ++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 arch/arm/dts/r8a77965-m3nulcb-u-boot.dts (limited to 'arch/arm/dts/r8a77965-m3nulcb-u-boot.dts') diff --git a/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts b/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts new file mode 100644 index 0000000000..c4700910d4 --- /dev/null +++ b/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot for the ULCB board + * + * Copyright (C) 2018 Marek Vasut + */ + +#include "r8a77965-m3nulcb.dts" +#include "r8a77965-u-boot.dtsi" + +/ { + cpld { + compatible = "renesas,ulcb-cpld"; + status = "okay"; + gpio-sck = <&gpio6 8 0>; + gpio-mosi = <&gpio6 7 0>; + gpio-miso = <&gpio6 10 0>; + gpio-sstbz = <&gpio2 3 0>; + }; +}; + +&sdhi2_pins { + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; + power-source = <1800>; +}; + +&sdhi2_pins_uhs { + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; +}; + +&sdhi0 { + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr104; + max-frequency = <208000000>; + status = "okay"; +}; + +&sdhi2 { + mmc-hs400-1_8v; + max-frequency = <200000000>; + status = "okay"; +}; -- cgit