From 2d0c3d6b168854260aa2e80852d3d618aa3347e9 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Wed, 4 Jul 2018 14:16:38 +0100
Subject: sunxi: DT: H3: update board .dts files from Linux

Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD)
Merge: 7c00e8ae041b 87815dda5593
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Mon Jun 11 17:57:38 2018 -0700

    Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

This also includes the OrangePi Zero .dts, which technically has an
Allwinner H2+ SoC.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts | 78 ++++++++++++++++++++++++++++++++
 1 file changed, 78 insertions(+)

(limited to 'arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts')

diff --git a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
index 8ddd1b2cc0..65cba10508 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -45,6 +45,28 @@
 / {
 	model = "FriendlyArm NanoPi M1 Plus";
 	compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3";
+
+	aliases {
+		serial1 = &uart3;
+		ethernet0 = &emac;
+		ethernet1 = &sdio_wifi;
+	};
+
+	reg_gmac_3v3: gmac-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "gmac-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		enable-active-high;
+		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+	};
 };
 
 &ehci1 {
@@ -55,6 +77,56 @@
 	status = "okay";
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii_pins>;
+	phy-supply = <&reg_gmac_3v3>;
+	phy-handle = <&ext_rgmii_phy>;
+	phy-mode = "rgmii";
+
+	status = "okay";
+};
+
+&external_mdio {
+	ext_rgmii_phy: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <7>;
+	};
+};
+
+&ir {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ir_pins_a>;
+	status = "okay";
+};
+
+&mmc1 {
+	vmmc-supply = <&reg_vcc3v3>;
+	vqmmc-supply = <&reg_vcc3v3>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+
+	sdio_wifi: sdio_wifi@1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&pio>;
+		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+		interrupt-names = "host-wake";
+	};
+};
+
+&mmc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_8bit_pins>;
+	vmmc-supply = <&reg_vcc3v3>;
+	vqmmc-supply = <&reg_vcc3v3>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
 &ohci1 {
 	status = "okay";
 };
@@ -62,3 +134,9 @@
 &ohci2 {
 	status = "okay";
 };
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
+	status = "okay";
+};
-- 
cgit