From d31f1c9236973a463a73cd2748bcc62939fc9247 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 18 Feb 2020 08:38:06 +0100 Subject: arm64: zynqmp: Update Copyright years to 2020 Trivial change. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index b580f9263d..222b67c7ce 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU102 RevA * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek */ -- cgit From 12ffe75819bb18b433642b21bbb5d1be7c0a1142 Mon Sep 17 00:00:00 2001 From: Manish Narani Date: Thu, 13 Feb 2020 23:37:30 -0700 Subject: arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux. Signed-off-by: Manish Narani --- arch/arm/dts/zynqmp-zcu102-revA.dts | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 222b67c7ce..e63f4b9cd8 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -655,7 +655,11 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; - no-1-8-v; /* for 1.0 silicon */ + /* + * 1.0 revision has level shifter and this property should be + * removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; -- cgit From 04437dea7c908c99edb98de7f485f0175d9bc48d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 18 Feb 2020 09:24:08 +0100 Subject: arm64: zynqmp: Sync DP subsystem Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index e63f4b9cd8..fd6dfdd3c2 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -705,33 +705,23 @@ status = "okay"; }; -&xilinx_drm { +&zynqmp_dpsub { status = "okay"; - clocks = <&si570_1>; }; -&xlnx_dp { +&zynqmp_dp_snd_codec0 { status = "okay"; }; -&xlnx_dp_sub { +&zynqmp_dp_snd_pcm0 { status = "okay"; - xlnx,vid-clk-pl; }; -&xlnx_dp_snd_pcm0 { +&zynqmp_dp_snd_pcm1 { status = "okay"; }; -&xlnx_dp_snd_pcm1 { - status = "okay"; -}; - -&xlnx_dp_snd_card { - status = "okay"; -}; - -&xlnx_dp_snd_codec0 { +&zynqmp_dp_snd_card0 { status = "okay"; }; -- cgit From 5df63a60aa3b509382d11c9115f22b54f86eef05 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 14 Feb 2020 14:19:56 +0100 Subject: arm64: zynqmp: Fix addresses in partition definitions Node name should be @
which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index fd6dfdd3c2..d250681600 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -614,19 +614,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@100000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; -- cgit